[Xen-changelog] [xen-unstable] amd iommu: Support INVALIDATE_IOMMU_ALL command.

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Wei Wang <wei.wang2@xxxxxxx>
# Date 1321968439 0
# Node ID 2bc6c29b14a791e63e396f830e79adf790668d24
# Parent  9a5e973305a84e868c6740626b76008c5476bfe9
amd iommu: Support INVALIDATE_IOMMU_ALL command.

It is one of the new architectural commands supported by iommu v2.
It instructs iommu to clear all address translation and interrupt
remapping caches for all devices and all domains.

Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>
Committed-by: Keir Fraser <keir@xxxxxxx>
---


diff -r 9a5e973305a8 -r 2bc6c29b14a7 xen/drivers/passthrough/amd/iommu_cmd.c
--- a/xen/drivers/passthrough/amd/iommu_cmd.c   Tue Nov 22 13:26:46 2011 +0000
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c   Tue Nov 22 13:27:19 2011 +0000
@@ -277,6 +277,20 @@
     send_iommu_command(iommu, cmd);
 }
 
+void invalidate_iommu_all(struct amd_iommu *iommu)
+{
+    u32 cmd[4], entry;
+
+    cmd[3] = cmd[2] = cmd[0] = 0;
+
+    set_field_in_reg_u32(IOMMU_CMD_INVALIDATE_IOMMU_ALL, 0,
+                         IOMMU_CMD_OPCODE_MASK, IOMMU_CMD_OPCODE_SHIFT,
+                         &entry);
+    cmd[1] = entry;
+
+    send_iommu_command(iommu, cmd);
+}
+
 void amd_iommu_flush_iotlb(struct pci_dev *pdev,
                            uint64_t gaddr, unsigned int order)
 {
@@ -380,3 +394,11 @@
     invalidate_interrupt_table(iommu, bdf);
     flush_command_buffer(iommu);
 }
+
+void amd_iommu_flush_all_caches(struct amd_iommu *iommu)
+{
+    ASSERT( spin_is_locked(&iommu->lock) );
+
+    invalidate_iommu_all(iommu);
+    flush_command_buffer(iommu);
+}
diff -r 9a5e973305a8 -r 2bc6c29b14a7 xen/drivers/passthrough/amd/iommu_init.c
--- a/xen/drivers/passthrough/amd/iommu_init.c  Tue Nov 22 13:26:46 2011 +0000
+++ b/xen/drivers/passthrough/amd/iommu_init.c  Tue Nov 22 13:27:19 2011 +0000
@@ -598,6 +598,9 @@
     set_iommu_event_log_control(iommu, IOMMU_CONTROL_ENABLED);
     set_iommu_translation_control(iommu, IOMMU_CONTROL_ENABLED);
 
+    if ( iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) )
+        amd_iommu_flush_all_caches(iommu);
+
     iommu->enabled = 1;
     spin_unlock_irqrestore(&iommu->lock, flags);
 
@@ -970,6 +973,9 @@
     }
 
     /* flush all cache entries after iommu re-enabled */
-    invalidate_all_devices();
-    invalidate_all_domain_pages();
+    if ( !iommu_has_feature(iommu, IOMMU_EXT_FEATURE_IASUP_SHIFT) )
+    {
+        invalidate_all_devices();
+        invalidate_all_domain_pages();
+    }
 }
diff -r 9a5e973305a8 -r 2bc6c29b14a7 
xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h      Tue Nov 22 13:26:46 
2011 +0000
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h      Tue Nov 22 13:27:19 
2011 +0000
@@ -192,6 +192,7 @@
 #define IOMMU_CMD_INVALIDATE_IOMMU_PAGES       0x3
 #define IOMMU_CMD_INVALIDATE_IOTLB_PAGES       0x4
 #define IOMMU_CMD_INVALIDATE_INT_TABLE         0x5
+#define IOMMU_CMD_INVALIDATE_IOMMU_ALL      0x8
 
 /* COMPLETION_WAIT command */
 #define IOMMU_COMP_WAIT_DATA_BUFFER_SIZE       8
diff -r 9a5e973305a8 -r 2bc6c29b14a7 
xen/include/asm-x86/hvm/svm/amd-iommu-proto.h
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h     Tue Nov 22 13:26:46 
2011 +0000
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-proto.h     Tue Nov 22 13:27:19 
2011 +0000
@@ -78,6 +78,7 @@
                            unsigned int order);
 void amd_iommu_flush_device(struct amd_iommu *iommu, uint16_t bdf);
 void amd_iommu_flush_intremap(struct amd_iommu *iommu, uint16_t bdf);
+void amd_iommu_flush_all_caches(struct amd_iommu *iommu);
 
 /* find iommu for bdf */
 struct amd_iommu *find_iommu_for_device(int seg, int bdf);

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