[Xen-changelog] [xen-unstable] x86: Use defines for bits of MSR_IA32_DEBUGCTLMSR instead of numbers

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxx>
# Date 1328111154 -3600
# Node ID 84b896135fd1b51cc4605129f1200786c795f453
# Parent  ab397bd22b565ed3dfa68e02c0b641a225b10762
x86: Use defines for bits of MSR_IA32_DEBUGCTLMSR instead of numbers

Signed-off-by: Dietmar Hahn <dietmar.hahn@xxxxxxxxxxxxxx>
Committed-by: Jan Beulich <jbeulich@xxxxxxxx>
---


diff -r ab397bd22b56 -r 84b896135fd1 xen/arch/x86/hvm/vmx/vmx.c
--- a/xen/arch/x86/hvm/vmx/vmx.c        Tue Jan 31 16:48:06 2012 +0000
+++ b/xen/arch/x86/hvm/vmx/vmx.c        Wed Feb 01 16:45:54 2012 +0100
@@ -1944,11 +1944,12 @@
         break;
     case MSR_IA32_DEBUGCTLMSR: {
         int i, rc = 0;
-
-        if ( !msr_content || (msr_content & ~3) )
+        uint64_t supported = IA32_DEBUGCTLMSR_LBR | IA32_DEBUGCTLMSR_BTF;
+
+        if ( !msr_content || (msr_content & ~supported) )
             break;
 
-        if ( msr_content & 1 )
+        if ( msr_content & IA32_DEBUGCTLMSR_LBR )
         {
             const struct lbr_info *lbr = last_branch_msr_get();
             if ( lbr == NULL )
diff -r ab397bd22b56 -r 84b896135fd1 xen/arch/x86/traps.c
--- a/xen/arch/x86/traps.c      Tue Jan 31 16:48:06 2012 +0000
+++ b/xen/arch/x86/traps.c      Wed Feb 01 16:45:54 2012 +0100
@@ -3376,12 +3376,12 @@
 static void ler_enable(void)
 {
     u64 debugctl;
-    
+
     if ( !this_cpu(ler_msr) )
         return;
 
     rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
-    wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | 1);
+    wrmsrl(MSR_IA32_DEBUGCTLMSR, debugctl | IA32_DEBUGCTLMSR_LBR);
 }
 
 void do_debug(struct cpu_user_regs *regs)
diff -r ab397bd22b56 -r 84b896135fd1 xen/include/asm-x86/msr-index.h
--- a/xen/include/asm-x86/msr-index.h   Tue Jan 31 16:48:06 2012 +0000
+++ b/xen/include/asm-x86/msr-index.h   Wed Feb 01 16:45:54 2012 +0100
@@ -65,11 +65,14 @@
 #define MSR_MTRRdefType                        0x000002ff
 
 #define MSR_IA32_DEBUGCTLMSR           0x000001d9
+#define IA32_DEBUGCTLMSR_LBR           (1<<0) /* Last Branch Record */
+#define IA32_DEBUGCTLMSR_BTF           (1<<1) /* Single Step on Branches */
+
 #define MSR_IA32_LASTBRANCHFROMIP      0x000001db
 #define MSR_IA32_LASTBRANCHTOIP                0x000001dc
 #define MSR_IA32_LASTINTFROMIP         0x000001dd
 #define MSR_IA32_LASTINTTOIP           0x000001de
- 
+
 #define MSR_IA32_MTRR_PHYSBASE0     0x00000200
 #define MSR_IA32_MTRR_PHYSMASK0     0x00000201
 #define MSR_IA32_MTRR_PHYSBASE1     0x00000202

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