[Xen-changelog] [xen-unstable] x86, tools/libxc: expose HLE/RTM features to pv and hvm

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Liu, Jinsong <jinsong.liu@xxxxxxxxx>
# Date 1330619512 0
# Node ID 2fbac9359e3b4fb61436e6e6653ec266b4f82ba9
# Parent  b198ada9689daf31193743b236f819288750296c
x86,tools/libxc: expose HLE/RTM features to pv and hvm

Intel recently release 2 new features, HLE and TRM.
Refer to http://software.intel.com/file/41417.
This patch expose them to pv and hvm

Signed-off-by: Liu, Jinsong <jinsong.liu@xxxxxxxxx>
Committed-by: Keir Fraser <keir@xxxxxxx>
---


diff -r b198ada9689d -r 2fbac9359e3b tools/libxc/xc_cpufeature.h
--- a/tools/libxc/xc_cpufeature.h       Thu Mar 01 16:29:59 2012 +0000
+++ b/tools/libxc/xc_cpufeature.h       Thu Mar 01 16:31:52 2012 +0000
@@ -129,10 +129,12 @@
 /* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx) */
 #define X86_FEATURE_FSGSBASE     0 /* {RD,WR}{FS,GS}BASE instructions */
 #define X86_FEATURE_BMI1         3 /* 1st group bit manipulation extensions */
+#define X86_FEATURE_HLE          4 /* Hardware Lock Elision */
 #define X86_FEATURE_AVX2         5 /* AVX2 instructions */
 #define X86_FEATURE_SMEP         7 /* Supervisor Mode Execution Protection */
 #define X86_FEATURE_BMI2         8 /* 2nd group bit manipulation extensions */
 #define X86_FEATURE_ERMS         9 /* Enhanced REP MOVSB/STOSB */
 #define X86_FEATURE_INVPCID     10 /* Invalidate Process Context ID */
+#define X86_FEATURE_RTM         11 /* Restricted Transactional Memory */
 
 #endif /* __LIBXC_CPUFEATURE_H */
diff -r b198ada9689d -r 2fbac9359e3b tools/libxc/xc_cpuid_x86.c
--- a/tools/libxc/xc_cpuid_x86.c        Thu Mar 01 16:29:59 2012 +0000
+++ b/tools/libxc/xc_cpuid_x86.c        Thu Mar 01 16:31:52 2012 +0000
@@ -363,11 +363,13 @@
     case 0x00000007: /* Intel-defined CPU features */
         if ( input[1] == 0 ) {
             regs[1] &= (bitmaskof(X86_FEATURE_BMI1) |
+                        bitmaskof(X86_FEATURE_HLE)  |
                         bitmaskof(X86_FEATURE_AVX2) |
                         bitmaskof(X86_FEATURE_SMEP) |
                         bitmaskof(X86_FEATURE_BMI2) |
                         bitmaskof(X86_FEATURE_ERMS) |
                         bitmaskof(X86_FEATURE_INVPCID) |
+                        bitmaskof(X86_FEATURE_RTM)  |
                         bitmaskof(X86_FEATURE_FSGSBASE));
         } else
             regs[1] = 0;
@@ -496,9 +498,11 @@
     case 0x00000007:
         if ( input[1] == 0 )
             regs[1] &= (bitmaskof(X86_FEATURE_BMI1) |
+                        bitmaskof(X86_FEATURE_HLE)  |
                         bitmaskof(X86_FEATURE_AVX2) |
                         bitmaskof(X86_FEATURE_BMI2) |
                         bitmaskof(X86_FEATURE_ERMS) |
+                        bitmaskof(X86_FEATURE_RTM)  |
                         bitmaskof(X86_FEATURE_FSGSBASE));
         else
             regs[1] = 0;

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