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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] arm: avoid memory write in switch to Hyp mode
# HG changeset patch
# User Tim Deegan <tim@xxxxxxx>
# Date 1338542438 -3600
# Node ID b2d9f2411d711d8177acf1af0fbe9f0c9115c7ef
# Parent b2649ecbe06f5624ca42066ea9d506eed1562d55
arm: avoid memory write in switch to Hyp mode
Assemble the new CPSR in registers instead. It's slightly cleaner,
And makes it possible to have a read-only text section.
Signed-off-by: Tim Deegan <tim@xxxxxxx>
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
diff -r b2649ecbe06f -r b2d9f2411d71 xen/arch/arm/mode_switch.S
--- a/xen/arch/arm/mode_switch.S Fri Jun 01 10:20:37 2012 +0100
+++ b/xen/arch/arm/mode_switch.S Fri Jun 01 10:20:38 2012 +0100
@@ -66,11 +66,7 @@ enter_hyp_mode:
mcr CP32(r0, FCSEIDR)
mcr CP32(r0, CONTEXTIDR)
/* FIXME: ought to reset some other NS control regs here */
- adr r1, 1f /* Store return address */
- str r3, [r1] /* where we can use it for RFE */
- isb /* Ensure we see the stored address */
- rfeia r1 /* Enter Hyp mode */
-
-1: .word 0 /* PC to enter Hyp mode at */
- .word 0x000001da /* CPSR: LE, Abort/IRQ/FIQ off, Hyp */
-
+ mrs r0, cpsr /* Copy the CPSR */
+ add r0, r0, #0x4 /* 0x16 (Monitor) -> 0x1a (Hyp) */
+ msr spsr_cxsf, r0 /* into the SPSR */
+ movs pc, r3 /* Exception-return into Hyp mode */
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