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[Xen-changelog] [xen-unstable] arm: allow ourselves access to all coprocessors in non-secure mode


  • To: xen-changelog@xxxxxxxxxxxxxxxxxxx
  • From: Xen patchbot-unstable <patchbot@xxxxxxx>
  • Date: Sat, 02 Jun 2012 03:11:13 +0000
  • Delivery-date: Sat, 02 Jun 2012 03:11:20 +0000
  • List-id: "Change log for Mercurial \(receive only\)" <xen-changelog.lists.xen.org>

# HG changeset patch
# User Tim Deegan <tim@xxxxxxx>
# Date 1338542439 -3600
# Node ID 8b7e5f6b1f7f84fd9aa170dc43ac88dad5e8e446
# Parent  10bb1cc00ab66e794831e0553d9045197be1d327
arm: allow ourselves access to all coprocessors in non-secure mode

We'll need it to be able to use the VFP extensions, for example.

Signed-off-by: Tim Deegan <tim@xxxxxxx>
Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---


diff -r 10bb1cc00ab6 -r 8b7e5f6b1f7f xen/arch/arm/mode_switch.S
--- a/xen/arch/arm/mode_switch.S        Fri Jun 01 10:20:39 2012 +0100
+++ b/xen/arch/arm/mode_switch.S        Fri Jun 01 10:20:39 2012 +0100
@@ -65,7 +65,10 @@ enter_hyp_mode:
        mov   r0, #0
        mcr   CP32(r0, FCSEIDR)
        mcr   CP32(r0, CONTEXTIDR)
-       /* FIXME: ought to reset some other NS control regs here */
+       /* Allow non-secure access to coprocessors, FIQs, VFP and NEON */
+       ldr   r1, =0x3fff            /* 14 CP bits set, all others clear */
+       mcr   CP32(r1, NSACR)
+
        mrs   r0, cpsr               /* Copy the CPSR */
        add   r0, r0, #0x4           /* 0x16 (Monitor) -> 0x1a (Hyp) */
        msr   spsr_cxsf, r0          /* into the SPSR */

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