[Xen-changelog] [xen-unstable] arm: move PSR flag definitions into interface, for tools use.

[Xen patchbot-unstable <patchbot@xxxxxxx>]

# HG changeset patch
# User Ian Campbell <ian.campbell@xxxxxxxxxx>
# Date 1341309151 -3600
# Node ID 481d7293aa533a6ee6544e8727499a6dca6bb741
# Parent  5d432081deddfe40f501ce4a1420fa126252c56e
arm: move PSR flag definitions into interface, for tools use.

Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
Acked-by: Tim Deegan <tim@xxxxxxx>
Committed-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---


diff -r 5d432081dedd -r 481d7293aa53 xen/arch/arm/entry.S
--- a/xen/arch/arm/entry.S      Tue Jul 03 10:52:30 2012 +0100
+++ b/xen/arch/arm/entry.S      Tue Jul 03 10:52:31 2012 +0100
@@ -1,5 +1,6 @@
 #include <xen/config.h>
 #include <asm/asm_defns.h>
+#include <public/xen.h>
 
 #define SAVE_ONE_BANKED(reg)   mrs r11, reg; str r11, [sp, #UREGS_##reg]
 #define RESTORE_ONE_BANKED(reg)        ldr r11, [sp, #UREGS_##reg]; msr reg, 
r11
diff -r 5d432081dedd -r 481d7293aa53 xen/include/asm-arm/page.h
--- a/xen/include/asm-arm/page.h        Tue Jul 03 10:52:30 2012 +0100
+++ b/xen/include/asm-arm/page.h        Tue Jul 03 10:52:31 2012 +0100
@@ -2,6 +2,8 @@
 #define __ARM_PAGE_H__
 
 #include <xen/config.h>
+#include <public/xen.h>
+#include <asm/processor.h>
 
 #define PADDR_BITS              40
 #define PADDR_MASK              ((1ULL << PADDR_BITS)-1)
diff -r 5d432081dedd -r 481d7293aa53 xen/include/asm-arm/processor.h
--- a/xen/include/asm-arm/processor.h   Tue Jul 03 10:52:30 2012 +0100
+++ b/xen/include/asm-arm/processor.h   Tue Jul 03 10:52:31 2012 +0100
@@ -3,27 +3,6 @@
 
 #include <asm/cpregs.h>
 
-/* PSR bits (CPSR, SPSR)*/
-
-/* 0-4: Mode */
-#define PSR_MODE_MASK 0x1f
-#define PSR_MODE_USR 0x10
-#define PSR_MODE_FIQ 0x11
-#define PSR_MODE_IRQ 0x12
-#define PSR_MODE_SVC 0x13
-#define PSR_MODE_MON 0x16
-#define PSR_MODE_ABT 0x17
-#define PSR_MODE_HYP 0x1a
-#define PSR_MODE_UND 0x1b
-#define PSR_MODE_SYS 0x1f
-
-#define PSR_THUMB       (1<<5)        /* Thumb Mode enable */
-#define PSR_FIQ_MASK    (1<<6)        /* Fast Interrupt mask */
-#define PSR_IRQ_MASK    (1<<7)        /* Interrupt mask */
-#define PSR_ABT_MASK    (1<<8)        /* Asynchronous Abort mask */
-#define PSR_BIG_ENDIAN  (1<<9)        /* Big Endian Mode */
-#define PSR_JAZELLE     (1<<24)       /* Jazelle Mode */
-
 /* TTBCR Translation Table Base Control Register */
 #define TTBCR_EAE    0x80000000
 #define TTBCR_N_MASK 0x07
diff -r 5d432081dedd -r 481d7293aa53 xen/include/asm-arm/system.h
--- a/xen/include/asm-arm/system.h      Tue Jul 03 10:52:30 2012 +0100
+++ b/xen/include/asm-arm/system.h      Tue Jul 03 10:52:31 2012 +0100
@@ -3,7 +3,7 @@
 #define __ASM_SYSTEM_H
 
 #include <xen/lib.h>
-#include <asm/processor.h>
+#include <public/arch-arm.h>
 
 #define nop() \
     asm volatile ( "nop" )
diff -r 5d432081dedd -r 481d7293aa53 xen/include/public/arch-arm.h
--- a/xen/include/public/arch-arm.h     Tue Jul 03 10:52:30 2012 +0100
+++ b/xen/include/public/arch-arm.h     Tue Jul 03 10:52:31 2012 +0100
@@ -138,7 +138,28 @@ struct arch_shared_info { };
 typedef struct arch_shared_info arch_shared_info_t;
 typedef uint64_t xen_callback_t;
 
-#endif
+#endif /* ifndef __ASSEMBLY __ */
+
+/* PSR bits (CPSR, SPSR)*/
+
+/* 0-4: Mode */
+#define PSR_MODE_MASK 0x1f
+#define PSR_MODE_USR 0x10
+#define PSR_MODE_FIQ 0x11
+#define PSR_MODE_IRQ 0x12
+#define PSR_MODE_SVC 0x13
+#define PSR_MODE_MON 0x16
+#define PSR_MODE_ABT 0x17
+#define PSR_MODE_HYP 0x1a
+#define PSR_MODE_UND 0x1b
+#define PSR_MODE_SYS 0x1f
+
+#define PSR_THUMB       (1<<5)        /* Thumb Mode enable */
+#define PSR_FIQ_MASK    (1<<6)        /* Fast Interrupt mask */
+#define PSR_IRQ_MASK    (1<<7)        /* Interrupt mask */
+#define PSR_ABT_MASK    (1<<8)        /* Asynchronous Abort mask */
+#define PSR_BIG_ENDIAN  (1<<9)        /* Big Endian Mode */
+#define PSR_JAZELLE     (1<<24)       /* Jazelle Mode */
 
 #endif /*  __XEN_PUBLIC_ARCH_ARM_H__ */
 

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