[Xen-changelog] [xen-4.1-testing] # HG changeset patch

[Xen patchbot-4.1-testing <patchbot@xxxxxxx>]

# HG changeset patch
# User Wei Wang <wei.wang2@xxxxxxx>
# Date 1346762677 -7200
# Node ID 060fbf05ce532d86314bd9db96fe9510495abed3
# Parent  520ab355fbb09ca9a0df1c01515011bcaa636799
# HG changeset patch
# User Wei Wang <wei.wang2@xxxxxxx>
# Date 1337786286 -7200
# Node ID af559b5afbecba1048ad690347455ad54098f935
# Parent  340062faf2988eeea94e37dbb3943c5a449bff10
amd iommu: Add workaround for erratum 732 & 733

Signed-off-by: Wei Wang <wei.wang2@xxxxxxx>

Add missing barriers. Fix early return from parse_ppr_log_entry().
Slightly adjust comments. Strip trailing blanks.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
xen-unstable changeset: 25387:af559b5afbec
xen-unstable date: Wed May 23 15:18:06 UTC 2012
---


diff -r 520ab355fbb0 -r 060fbf05ce53 xen/drivers/passthrough/amd/iommu_init.c
--- a/xen/drivers/passthrough/amd/iommu_init.c  Tue Sep 04 14:43:57 2012 +0200
+++ b/xen/drivers/passthrough/amd/iommu_init.c  Tue Sep 04 14:44:37 2012 +0200
@@ -27,6 +27,7 @@
 #include <asm/hvm/svm/amd-iommu-proto.h>
 #include <asm-x86/fixmap.h>
 #include <mach_apic.h>
+#include <xen/delay.h>
 
 static struct amd_iommu **irq_to_iommu;
 static int nr_amd_iommus;
@@ -467,6 +468,7 @@ static void parse_event_log_entry(u32 en
     u16 domain_id, device_id, bdf, cword;
     u32 code;
     u64 *addr;
+    int count = 0;
     char * event_str[] = {"ILLEGAL_DEV_TABLE_ENTRY",
                           "IO_PAGE_FAULT",
                           "DEV_TABLE_HW_ERROR",
@@ -479,6 +481,25 @@ static void parse_event_log_entry(u32 en
     code = get_field_from_reg_u32(entry[1], IOMMU_EVENT_CODE_MASK,
                                             IOMMU_EVENT_CODE_SHIFT);
 
+    /*
+     * Workaround for erratum 732:
+     * It can happen that the tail pointer is updated before the actual entry
+     * got written. As suggested by RevGuide, we initialize the event log
+     * buffer to all zeros and clear event log entries after processing them.
+     */
+    while ( code == 0 )
+    {
+        if ( unlikely(++count == IOMMU_LOG_ENTRY_TIMEOUT) )
+        {
+            AMD_IOMMU_DEBUG("AMD-Vi: No event written to log\n");
+            return;
+        }
+        udelay(1);
+        rmb();
+        code = get_field_from_reg_u32(entry[1], IOMMU_EVENT_CODE_MASK,
+                                      IOMMU_EVENT_CODE_SHIFT);
+    }
+
     if ( (code > IOMMU_EVENT_INVALID_DEV_REQUEST) ||
         (code < IOMMU_EVENT_ILLEGAL_DEV_TABLE_ENTRY) )
     {
@@ -517,6 +538,8 @@ static void parse_event_log_entry(u32 en
         AMD_IOMMU_DEBUG("event 0x%08x 0x%08x 0x%08x 0x%08x\n", entry[0],
                         entry[1], entry[2], entry[3]);
     }
+
+    memset(entry, 0, IOMMU_EVENT_LOG_ENTRY_SIZE);
 }
 
 static void do_amd_iommu_irq(unsigned long data)
diff -r 520ab355fbb0 -r 060fbf05ce53 
xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h      Tue Sep 04 14:43:57 
2012 +0200
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h      Tue Sep 04 14:44:37 
2012 +0200
@@ -269,6 +269,8 @@
 #define IOMMU_EVENT_DEVICE_ID_MASK           0x0000FFFF
 #define IOMMU_EVENT_DEVICE_ID_SHIFT          0
 
+#define IOMMU_LOG_ENTRY_TIMEOUT                         1000
+
 /* Control Register */
 #define IOMMU_CONTROL_MMIO_OFFSET                      0x18
 #define IOMMU_CONTROL_TRANSLATION_ENABLE_MASK          0x00000001

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