[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen-unstable] nested vmx: expose bit 55 of IA32_VMX_BASIC_MSR to guest VMM
# HG changeset patch # User Dongxiao Xu <dongxiao.xu@xxxxxxxxx> # Date 1354812837 0 # Node ID bfd8e96fa3f157630f9698401a1f040ca1776c8e # Parent 19abfa1a4c1360d06b19774ad20eb8e4a185eb35 nested vmx: expose bit 55 of IA32_VMX_BASIC_MSR to guest VMM Besides, use literal name instead of hard numbers for this bit 55 in IA32_VMX_BASIC_MSR. Signed-off-by: Dongxiao Xu <dongxiao.xu@xxxxxxxxx> Acked-by: Jan Beulich <jbeulich@xxxxxxxx> Committed-by: Keir Fraser <keir@xxxxxxx> --- diff -r 19abfa1a4c13 -r bfd8e96fa3f1 xen/arch/x86/hvm/vmx/vmcs.c --- a/xen/arch/x86/hvm/vmx/vmcs.c Thu Dec 06 16:53:30 2012 +0000 +++ b/xen/arch/x86/hvm/vmx/vmcs.c Thu Dec 06 16:53:57 2012 +0000 @@ -237,7 +237,7 @@ static int vmx_init_vmcs_config(void) * We check VMX_BASIC_MSR[55] to correctly handle default controls. */ uint32_t must_be_one, must_be_zero, msr = MSR_IA32_VMX_PROCBASED_CTLS; - if ( vmx_basic_msr_high & (1u << 23) ) + if ( vmx_basic_msr_high & (VMX_BASIC_DEFAULT1_ZERO >> 32) ) msr = MSR_IA32_VMX_TRUE_PROCBASED_CTLS; rdmsr(msr, must_be_one, must_be_zero); if ( must_be_one & (CPU_BASED_INVLPG_EXITING | diff -r 19abfa1a4c13 -r bfd8e96fa3f1 xen/arch/x86/hvm/vmx/vvmx.c --- a/xen/arch/x86/hvm/vmx/vvmx.c Thu Dec 06 16:53:30 2012 +0000 +++ b/xen/arch/x86/hvm/vmx/vvmx.c Thu Dec 06 16:53:57 2012 +0000 @@ -1311,9 +1311,10 @@ int nvmx_msr_read_intercept(unsigned int switch (msr) { case MSR_IA32_VMX_BASIC: data = VVMCS_REVISION | ((u64)PAGE_SIZE) << 32 | - ((u64)MTRR_TYPE_WRBACK) << 50; + ((u64)MTRR_TYPE_WRBACK) << 50 | VMX_BASIC_DEFAULT1_ZERO; break; case MSR_IA32_VMX_PINBASED_CTLS: + case MSR_IA32_VMX_TRUE_PINBASED_CTLS: /* 1-seetings */ data = PIN_BASED_EXT_INTR_MASK | PIN_BASED_NMI_EXITING | @@ -1322,6 +1323,7 @@ int nvmx_msr_read_intercept(unsigned int data = ((data | tmp) << 32) | (tmp); break; case MSR_IA32_VMX_PROCBASED_CTLS: + case MSR_IA32_VMX_TRUE_PROCBASED_CTLS: /* 1-seetings */ data = CPU_BASED_HLT_EXITING | CPU_BASED_VIRTUAL_INTR_PENDING | @@ -1353,6 +1355,7 @@ int nvmx_msr_read_intercept(unsigned int data = (data << 32) | tmp; break; case MSR_IA32_VMX_EXIT_CTLS: + case MSR_IA32_VMX_TRUE_EXIT_CTLS: /* 1-seetings */ tmp = VMX_EXIT_CTLS_DEFAULT1; data = VM_EXIT_ACK_INTR_ON_EXIT | @@ -1367,6 +1370,7 @@ int nvmx_msr_read_intercept(unsigned int data = ((data | tmp) << 32) | tmp; break; case MSR_IA32_VMX_ENTRY_CTLS: + case MSR_IA32_VMX_TRUE_ENTRY_CTLS: /* 1-seetings */ tmp = VMX_ENTRY_CTLS_DEFAULT1; data = VM_ENTRY_LOAD_GUEST_PAT | diff -r 19abfa1a4c13 -r bfd8e96fa3f1 xen/include/asm-x86/hvm/vmx/vmcs.h --- a/xen/include/asm-x86/hvm/vmx/vmcs.h Thu Dec 06 16:53:30 2012 +0000 +++ b/xen/include/asm-x86/hvm/vmx/vmcs.h Thu Dec 06 16:53:57 2012 +0000 @@ -247,6 +247,12 @@ extern bool_t cpu_has_vmx_ins_outs_instr #define VMX_INTR_SHADOW_SMI 0x00000004 #define VMX_INTR_SHADOW_NMI 0x00000008 +/* + * bit 55 of IA32_VMX_BASIC MSR, indicating whether any VMX controls that + * default to 1 may be cleared to 0. + */ +#define VMX_BASIC_DEFAULT1_ZERO (1ULL << 55) + /* VMCS field encodings. */ enum vmcs_field { VIRTUAL_PROCESSOR_ID = 0x00000000, _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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