[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] xen: arm: select_user_reg support for 64-bit hypervisor
commit 16636d9085c9840157be2c0c5f08a6282b642d27 Author: Ian Campbell <ian.campbell@xxxxxxxxxx> AuthorDate: Fri Feb 22 08:58:16 2013 +0000 Commit: Ian Campbell <ian.campbell@xxxxxxxxxx> CommitDate: Fri Feb 22 12:14:55 2013 +0000 xen: arm: select_user_reg support for 64-bit hypervisor Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> Acked-by: Tim Deegan <tim@xxxxxxx> --- xen/arch/arm/traps.c | 10 ++++++++++ 1 files changed, 10 insertions(+), 0 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index 75d42ab..6be70fa 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -72,6 +72,7 @@ register_t *select_user_reg(struct cpu_user_regs *regs, int reg) { BUG_ON( !guest_mode(regs) ); +#ifdef CONFIG_ARM_32 /* * We rely heavily on the layout of cpu_user_regs to avoid having * to handle all of the registers individually. Use BUILD_BUG_ON to @@ -124,6 +125,15 @@ register_t *select_user_reg(struct cpu_user_regs *regs, int reg) BUG(); } #undef REGOFFS +#else + /* In 64 bit the syndrome register contains the AArch64 register + * number even if the trap was from AArch32 mode. Except that + * AArch32 R15 (PC) is encoded as 0b11111. + */ + if ( reg == 0x1f /* && is aarch32 guest */) + return ®s->pc; + return ®s->x0 + reg; +#endif } static const char *decode_fsc(uint32_t fsc, int *level) -- generated by git-patchbot for /home/xen/git/xen.git#master _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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