[Xen-changelog] [xen master] xen: arm: Set EL1 register width in HCR_EL2 during context switch.

[patchbot@xxxxxxx]

commit d47bbc7e0ce1919e01a111543d355dd2f5e33a58
Author:     Ian Campbell <ian.campbell@xxxxxxxxxx>
AuthorDate: Mon Jul 29 13:20:58 2013 +0100
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Mon Jul 29 16:54:50 2013 +0100

    xen: arm: Set EL1 register width in HCR_EL2 during context switch.
    
    Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
    Acked-by: Stefano Stabellini <stefano.stabellini@xxxxxxxxxxxxx>
---
 xen/arch/arm/domain.c           |    5 +++++
 xen/include/asm-arm/processor.h |    1 +
 2 files changed, 6 insertions(+), 0 deletions(-)

diff --git a/xen/arch/arm/domain.c b/xen/arch/arm/domain.c
index bf204d3..b4d99f1 100644
--- a/xen/arch/arm/domain.c
+++ b/xen/arch/arm/domain.c
@@ -207,6 +207,11 @@ static void ctxt_switch_to(struct vcpu *n)
 
     isb();
 
+    if ( is_pv32_domain(n->domain) )
+        hcr &= ~HCR_RW;
+    else
+        hcr |= HCR_RW;
+
     WRITE_SYSREG(hcr, HCR_EL2);
     isb();
 
diff --git a/xen/include/asm-arm/processor.h b/xen/include/asm-arm/processor.h
index 2c20821..59215b8 100644
--- a/xen/include/asm-arm/processor.h
+++ b/xen/include/asm-arm/processor.h
@@ -49,6 +49,7 @@
 #define PSR_GUEST_INIT  (PSR_ABT_MASK|PSR_FIQ_MASK|PSR_IRQ_MASK)
 
 /* HCR Hyp Configuration Register */
+#define HCR_RW          (1<<31) /* ARM64 only */
 #define HCR_TGE         (1<<27)
 #define HCR_TVM         (1<<26)
 #define HCR_TTLB        (1<<25)
--
generated by git-patchbot for /home/xen/git/xen.git#master

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