[Xen-changelog] [xen master] x86/mwait_idle: initial C8, C9, C10 support

[patchbot@xxxxxxx]

commit 6e287713c94b40bbf21a378eab622108b1186233
Author:     Len Brown <len.brown@xxxxxxxxx>
AuthorDate: Fri Aug 30 11:00:07 2013 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Aug 30 11:00:07 2013 +0200

    x86/mwait_idle: initial C8, C9, C10 support
    
    Allow mwait_idle to utilize C8, C9, C10 when they are present on...
    "Fourth Generation Intel(R) Core(TM) Processors", which are based on
    Intel(R) microarchitecture code name Haswell.
    
    Signed-off-by: Len Brown <len.brown@xxxxxxxxx>
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Keir Fraser <keir@xxxxxxx>
---
 xen/arch/x86/cpu/mwait-idle.c |   18 ++++++++++++++++++
 1 files changed, 18 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/cpu/mwait-idle.c b/xen/arch/x86/cpu/mwait-idle.c
index 8799632..85179f2 100644
--- a/xen/arch/x86/cpu/mwait-idle.c
+++ b/xen/arch/x86/cpu/mwait-idle.c
@@ -252,6 +252,24 @@ static const struct cpuidle_state hsw_cstates[] = {
                .exit_latency = 166,
                .target_residency = 500,
        },
+       {
+               .name = "C8-HSW",
+               .flags = MWAIT2flg(0x40) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 300,
+               .target_residency = 900,
+       },
+       {
+               .name = "C9-HSW",
+               .flags = MWAIT2flg(0x50) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 600,
+               .target_residency = 1800,
+       },
+       {
+               .name = "C10-HSW",
+               .flags = MWAIT2flg(0x60) | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 2600,
+               .target_residency = 7700,
+       },
        {}
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#master

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxx
http://lists.xensource.com/xen-changelog