[Xen-changelog] [xen master] xen: arm: Enable 1:1 workaround by default

[patchbot@xxxxxxx]

commit 71952bfcbe9187765cf4010b1479af86def4fb1f
Author:     Ian Campbell <ian.campbell@xxxxxxxxxx>
AuthorDate: Wed Dec 4 14:54:21 2013 +0000
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Wed Dec 4 17:01:51 2013 +0000

    xen: arm: Enable 1:1 workaround by default
    
    I was just about to send out patches adding the 1:1 workaround to vexpress
    (the foundation model is a vexpress platfrom with DMA) and sunxi.
    
    That would have meant that all platforms now implement the quirk. Instead 
lets
    just make it the default and remove the quirk.
    
    In the future this will likely be set based on the presence absence of an
    IOMMU, perhaps with additional overrides by the platform.
    
    This results in some dead code in domain_build for dealing with the non-1:1
    case. This is deliberate and is left in anticipation of IOMMU support in 
4.5.
    
    PLATFORM_QUIRK_GIC_64K_STRIDE is renumbered as a side effect of this change.
    
    Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
    Acked-by: Julien Grall <julien.grall@xxxxxxxxxx>
---
 xen/arch/arm/domain_build.c          |    4 +++-
 xen/arch/arm/platforms/exynos5.c     |    6 ------
 xen/arch/arm/platforms/midway.c      |    6 ------
 xen/arch/arm/platforms/omap5.c       |    6 ------
 xen/arch/arm/platforms/xgene-storm.c |    2 +-
 xen/include/asm-arm/platform.h       |    7 +------
 6 files changed, 5 insertions(+), 26 deletions(-)

diff --git a/xen/arch/arm/domain_build.c b/xen/arch/arm/domain_build.c
index 7fa6e02..532e811 100644
--- a/xen/arch/arm/domain_build.c
+++ b/xen/arch/arm/domain_build.c
@@ -22,6 +22,8 @@
 static unsigned int __initdata opt_dom0_max_vcpus;
 integer_param("dom0_max_vcpus", opt_dom0_max_vcpus);
 
+static int dom0_11_mapping = 1;
+
 #define DOM0_MEM_DEFAULT 0x8000000 /* 128 MiB */
 static u64 __initdata dom0_mem = DOM0_MEM_DEFAULT;
 
@@ -110,7 +112,7 @@ static void allocate_memory(struct domain *d, struct 
kernel_info *kinfo)
     u32 reg_len, reg_size;
     unsigned int bank = 0;
 
-    if ( platform_has_quirk(PLATFORM_QUIRK_DOM0_MAPPING_11) )
+    if ( dom0_11_mapping )
         return allocate_memory_11(d, kinfo);
 
     while ( (memory = dt_find_node_by_type(memory, "memory")) )
diff --git a/xen/arch/arm/platforms/exynos5.c b/xen/arch/arm/platforms/exynos5.c
index 0e76cac..fa6b465 100644
--- a/xen/arch/arm/platforms/exynos5.c
+++ b/xen/arch/arm/platforms/exynos5.c
@@ -111,11 +111,6 @@ static void exynos5_reset(void)
     iounmap(pmu);
 }
 
-static uint32_t exynos5_quirks(void)
-{
-    return PLATFORM_QUIRK_DOM0_MAPPING_11;
-}
-
 static const char * const exynos5_dt_compat[] __initconst =
 {
     "samsung,exynos5250",
@@ -139,7 +134,6 @@ PLATFORM_START(exynos5, "SAMSUNG EXYNOS5")
     .smp_init = exynos5_smp_init,
     .cpu_up = exynos5_cpu_up,
     .reset = exynos5_reset,
-    .quirks = exynos5_quirks,
     .blacklist_dev = exynos5_blacklist_dev,
 PLATFORM_END
 
diff --git a/xen/arch/arm/platforms/midway.c b/xen/arch/arm/platforms/midway.c
index 399056b..b221279 100644
--- a/xen/arch/arm/platforms/midway.c
+++ b/xen/arch/arm/platforms/midway.c
@@ -42,11 +42,6 @@ static void midway_reset(void)
     iounmap(pmu);
 }
 
-static uint32_t midway_quirks(void)
-{
-    return PLATFORM_QUIRK_DOM0_MAPPING_11;
-}
-
 static const char * const midway_dt_compat[] __initconst =
 {
     "calxeda,ecx-2000",
@@ -56,7 +51,6 @@ static const char * const midway_dt_compat[] __initconst =
 PLATFORM_START(midway, "CALXEDA MIDWAY")
     .compatible = midway_dt_compat,
     .reset = midway_reset,
-    .quirks = midway_quirks,
 PLATFORM_END
 
 /*
diff --git a/xen/arch/arm/platforms/omap5.c b/xen/arch/arm/platforms/omap5.c
index 54fa5ff..3a3b16b 100644
--- a/xen/arch/arm/platforms/omap5.c
+++ b/xen/arch/arm/platforms/omap5.c
@@ -153,11 +153,6 @@ static int __init omap5_cpu_up(int cpu)
     return 0;
 }
 
-static uint32_t omap5_quirks(void)
-{
-    return PLATFORM_QUIRK_DOM0_MAPPING_11;
-}
-
 static const char const *omap5_dt_compat[] __initconst =
 {
     "ti,omap5",
@@ -170,7 +165,6 @@ PLATFORM_START(omap5, "TI OMAP5")
     .specific_mapping = omap5_specific_mapping,
     .smp_init = omap5_smp_init,
     .cpu_up = omap5_cpu_up,
-    .quirks = omap5_quirks,
 PLATFORM_END
 
 /*
diff --git a/xen/arch/arm/platforms/xgene-storm.c 
b/xen/arch/arm/platforms/xgene-storm.c
index ea9b0f4..f760fcd 100644
--- a/xen/arch/arm/platforms/xgene-storm.c
+++ b/xen/arch/arm/platforms/xgene-storm.c
@@ -24,7 +24,7 @@
 
 static uint32_t xgene_storm_quirks(void)
 {
-    return PLATFORM_QUIRK_DOM0_MAPPING_11|PLATFORM_QUIRK_GIC_64K_STRIDE;
+    return PLATFORM_QUIRK_GIC_64K_STRIDE;
 }
 
 static int map_one_mmio(struct domain *d, const char *what,
diff --git a/xen/include/asm-arm/platform.h b/xen/include/asm-arm/platform.h
index 5900ee4..edb399b 100644
--- a/xen/include/asm-arm/platform.h
+++ b/xen/include/asm-arm/platform.h
@@ -44,15 +44,10 @@ struct platform_desc {
 };
 
 /*
- * Quirk to map dom0 memory in 1:1
- * Useful on platform where System MMU is not yet implemented
- */
-#define PLATFORM_QUIRK_DOM0_MAPPING_11 (1 << 0)
-/*
  * Quirk for platforms where the 4K GIC register ranges are placed at
  * 64K stride.
  */
-#define PLATFORM_QUIRK_GIC_64K_STRIDE (1 << 1)
+#define PLATFORM_QUIRK_GIC_64K_STRIDE (1 << 0)
 
 void __init platform_init(void);
 int __init platform_init_time(void);
--
generated by git-patchbot for /home/xen/git/xen.git#master

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