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[Xen-changelog] [xen stable-4.2] x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE

commit 744165288752c2cfc179e5aeed6e3aa9905b480a
Author:     Paul Durrant <paul.durrant@xxxxxxxxxx>
AuthorDate: Fri Jan 17 16:41:38 2014 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Jan 17 16:41:38 2014 +0100

    x86/VT-x: Disable MSR intercept for SHADOW_GS_BASE
    Intercepting this MSR is pointless - The swapgs instruction does not cause a
    vmexit, so the cached result of this is potentially stale after the next 
    instruction.  It is correctly saved and restored on vcpu context switch.
    Furthermore, 64bit Windows writes to this MSR on every thread context 
    so interception causes a substantial performance hit.
    Signed-off-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Tim Deegan <tim@xxxxxxx>
    Acked-by: Jun Nakajima <jun.nakajima@xxxxxxxxx>
    master commit: a82e98d473fd212316ea5aa078a7588324b020e5
    master date: 2013-11-15 11:02:17 +0100
 xen/arch/x86/hvm/vmx/vmcs.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/hvm/vmx/vmcs.c b/xen/arch/x86/hvm/vmx/vmcs.c
index da30039..6042dd1 100644
--- a/xen/arch/x86/hvm/vmx/vmcs.c
+++ b/xen/arch/x86/hvm/vmx/vmcs.c
@@ -776,6 +776,7 @@ static int construct_vmcs(struct vcpu *v)
         vmx_disable_intercept_for_msr(v, MSR_FS_BASE);
         vmx_disable_intercept_for_msr(v, MSR_GS_BASE);
+        vmx_disable_intercept_for_msr(v, MSR_SHADOW_GS_BASE);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_CS);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_ESP);
         vmx_disable_intercept_for_msr(v, MSR_IA32_SYSENTER_EIP);
generated by git-patchbot for /home/xen/git/xen.git#stable-4.2

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