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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] x86/cpu: Store extended cpuid level in cpuinfo_x86
commit aedad8031366ec9122dd0cc14fea784e18cc739a
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Wed Feb 26 17:22:30 2014 +0100
Commit: Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed Feb 26 17:22:30 2014 +0100
x86/cpu: Store extended cpuid level in cpuinfo_x86
To save finding it repeatedly with cpuid instructions. The name
"extended_cpuid_level" is chosen to match Linux.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
xen/arch/x86/cpu/amd.c | 4 ++--
xen/arch/x86/cpu/common.c | 22 ++++++++++------------
xen/arch/x86/hvm/svm/svm.c | 2 +-
xen/arch/x86/oprofile/op_model_athlon.c | 5 +----
xen/include/asm-x86/processor.h | 1 +
5 files changed, 15 insertions(+), 19 deletions(-)
diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c
index 44087fa..904ad2e 100644
--- a/xen/arch/x86/cpu/amd.c
+++ b/xen/arch/x86/cpu/amd.c
@@ -419,11 +419,11 @@ static void __devinit init_amd(struct cpuinfo_x86 *c)
display_cacheinfo(c);
- if (cpuid_eax(0x80000000) >= 0x80000008) {
+ if (c->extended_cpuid_level >= 0x80000008) {
c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
}
- if (cpuid_eax(0x80000000) >= 0x80000007) {
+ if (c->extended_cpuid_level >= 0x80000007) {
c->x86_power = cpuid_edx(0x80000007);
if (c->x86_power & (1<<8)) {
set_bit(X86_FEATURE_CONSTANT_TSC, c->x86_capability);
diff --git a/xen/arch/x86/cpu/common.c b/xen/arch/x86/cpu/common.c
index 32ca458..2c128e5 100644
--- a/xen/arch/x86/cpu/common.c
+++ b/xen/arch/x86/cpu/common.c
@@ -74,7 +74,7 @@ int __cpuinit get_model_name(struct cpuinfo_x86 *c)
unsigned int *v;
char *p, *q;
- if (cpuid_eax(0x80000000) < 0x80000004)
+ if (c->extended_cpuid_level < 0x80000004)
return 0;
v = (unsigned int *) c->x86_model_id;
@@ -101,11 +101,9 @@ int __cpuinit get_model_name(struct cpuinfo_x86 *c)
void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
{
- unsigned int n, dummy, ecx, edx, l2size;
+ unsigned int dummy, ecx, edx, l2size;
- n = cpuid_eax(0x80000000);
-
- if (n >= 0x80000005) {
+ if (c->extended_cpuid_level >= 0x80000005) {
cpuid(0x80000005, &dummy, &dummy, &ecx, &edx);
if (opt_cpu_info)
printk("CPU: L1 I cache %dK (%d bytes/line),"
@@ -114,7 +112,7 @@ void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
c->x86_cache_size=(ecx>>24)+(edx>>24);
}
- if (n < 0x80000006) /* Some chips just has a large L1. */
+ if (c->extended_cpuid_level < 0x80000006) /* Some chips just has
a large L1. */
return;
ecx = cpuid_ecx(0x80000006);
@@ -195,7 +193,7 @@ static void __init early_cpu_detect(void)
static void __cpuinit generic_identify(struct cpuinfo_x86 *c)
{
- u32 tfms, xlvl, capability, excap, ebx;
+ u32 tfms, capability, excap, ebx;
/* Get vendor name */
cpuid(0x00000000, &c->cpuid_level,
@@ -222,15 +220,15 @@ static void __cpuinit generic_identify(struct cpuinfo_x86
*c)
c->x86_clflush_size = ((ebx >> 8) & 0xff) * 8;
/* AMD-defined flags: level 0x80000001 */
- xlvl = cpuid_eax(0x80000000);
- if ( (xlvl & 0xffff0000) == 0x80000000 ) {
- if ( xlvl >= 0x80000001 ) {
+ c->extended_cpuid_level = cpuid_eax(0x80000000);
+ if ( (c->extended_cpuid_level & 0xffff0000) == 0x80000000 ) {
+ if ( c->extended_cpuid_level >= 0x80000001 ) {
c->x86_capability[1] = cpuid_edx(0x80000001);
c->x86_capability[6] = cpuid_ecx(0x80000001);
}
- if ( xlvl >= 0x80000004 )
+ if ( c->extended_cpuid_level >= 0x80000004 )
get_model_name(c); /* Default name */
- if ( xlvl >= 0x80000008 )
+ if ( c->extended_cpuid_level >= 0x80000008 )
paddr_bits = cpuid_eax(0x80000008) & 0xff;
}
diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c
index 406d394..61b1ec8 100644
--- a/xen/arch/x86/hvm/svm/svm.c
+++ b/xen/arch/x86/hvm/svm/svm.c
@@ -1251,7 +1251,7 @@ const struct hvm_function_table * __init start_svm(void)
setup_vmcb_dump();
- svm_feature_flags = ((cpuid_eax(0x80000000) >= 0x8000000A) ?
+ svm_feature_flags = (current_cpu_data.extended_cpuid_level >= 0x8000000A ?
cpuid_edx(0x8000000A) : 0);
printk("SVM: Supported advanced features:\n");
diff --git a/xen/arch/x86/oprofile/op_model_athlon.c
b/xen/arch/x86/oprofile/op_model_athlon.c
index e784018..ad84768 100644
--- a/xen/arch/x86/oprofile/op_model_athlon.c
+++ b/xen/arch/x86/oprofile/op_model_athlon.c
@@ -497,14 +497,11 @@ static int __init init_ibs_nmi(void)
static void __init get_ibs_caps(void)
{
- unsigned int max_level;
-
if (!boot_cpu_has(X86_FEATURE_IBS))
return;
/* check IBS cpuid feature flags */
- max_level = cpuid_eax(0x80000000);
- if (max_level >= IBS_CPUID_FEATURES)
+ if (current_cpu_data.extended_cpuid_level >= IBS_CPUID_FEATURES)
ibs_caps = cpuid_eax(IBS_CPUID_FEATURES);
if (!(ibs_caps & IBS_CAPS_AVAIL))
/* cpuid flags not valid */
diff --git a/xen/include/asm-x86/processor.h b/xen/include/asm-x86/processor.h
index c120460..f1cccff 100644
--- a/xen/include/asm-x86/processor.h
+++ b/xen/include/asm-x86/processor.h
@@ -162,6 +162,7 @@ struct cpuinfo_x86 {
__u8 x86_model;
__u8 x86_mask;
int cpuid_level; /* Maximum supported CPUID level, -1=no CPUID */
+ __u32 extended_cpuid_level; /* Maximum supported CPUID extended level */
unsigned int x86_capability[NCAPINTS];
char x86_vendor_id[16];
char x86_model_id[64];
--
generated by git-patchbot for /home/xen/git/xen.git#master
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