[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] tools: arm: support up to (almost) 1TB of guest RAM
commit bf52565e0da9bef64a9a6a32e848ce6de87da05e Author: Ian Campbell <ian.campbell@xxxxxxxxxx> AuthorDate: Thu May 22 10:46:43 2014 +0100 Commit: Ian Campbell <ian.campbell@xxxxxxxxxx> CommitDate: Mon Jun 2 14:58:27 2014 +0100 tools: arm: support up to (almost) 1TB of guest RAM This creates a second bank of RAM starting at 8GB and potentially extending to the 1TB boundary, which is the limit imposed by our current use of a 3 level p2m with 2 pages at level 0 (2^40 bits). I've deliberately left a gap between the two banks just to exercise those code paths. The second bank is 1016GB in size which plus the 3GB below 4GB is 1019GB maximum guest RAM. At the point where the fact that this is slightly less than a full TB starts to become an issue for people then we can switch to a 4 level p2m, which would be needed to support guests larger than 1TB anyhow. Tested on 32-bit with 1, 4 and 6GB guests. Anything more than ~3GB requires an LPAE enabled kernel, or a 64-bit guest. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> Acked-by: Julien Grall <julien.grall@xxxxxxxxxx> Acked-by: Ian Jackson <ian.jackson@xxxxxxxxxxxxx> --- xen/include/public/arch-arm.h | 13 ++++++++----- 1 files changed, 8 insertions(+), 5 deletions(-) diff --git a/xen/include/public/arch-arm.h b/xen/include/public/arch-arm.h index ea74295..fd30782 100644 --- a/xen/include/public/arch-arm.h +++ b/xen/include/public/arch-arm.h @@ -375,17 +375,20 @@ typedef uint64_t xen_callback_t; #define GUEST_MAGIC_BASE 0x39000000ULL #define GUEST_MAGIC_SIZE 0x01000000ULL -#define GUEST_RAM_BANKS 1 +#define GUEST_RAM_BANKS 2 -#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of RAM @ 1GB */ +#define GUEST_RAM0_BASE 0x40000000ULL /* 3GB of low RAM @ 1GB */ #define GUEST_RAM0_SIZE 0xc0000000ULL +#define GUEST_RAM1_BASE 0x0200000000ULL /* 1016GB of RAM @ 8GB */ +#define GUEST_RAM1_SIZE 0xfe00000000ULL + #define GUEST_RAM_BASE GUEST_RAM0_BASE /* Lowest RAM address */ /* Largest amount of actual RAM, not including holes */ -#define GUEST_RAM_MAX (GUEST_RAM0_SIZE) +#define GUEST_RAM_MAX (GUEST_RAM0_SIZE + GUEST_RAM1_SIZE) /* Suitable for e.g. const uint64_t ramfoo[] = GUEST_RAM_BANK_FOOS; */ -#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE } -#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE } +#define GUEST_RAM_BANK_BASES { GUEST_RAM0_BASE, GUEST_RAM1_BASE } +#define GUEST_RAM_BANK_SIZES { GUEST_RAM0_SIZE, GUEST_RAM1_SIZE } /* Interrupts */ #define GUEST_TIMER_VIRT_PPI 27 -- generated by git-patchbot for /home/xen/git/xen.git#master _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
|
Lists.xenproject.org is hosted with RackSpace, monitoring our |