[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] xen: arm: move setup_virt_paging to p2m.[ch] from mm.[ch]
commit e0994a4b6d6afc23019dbafaa326acb70416a2dc Author: Ian Campbell <ian.campbell@xxxxxxxxxx> AuthorDate: Thu Sep 18 01:09:50 2014 +0100 Commit: Ian Campbell <ian.campbell@xxxxxxxxxx> CommitDate: Mon Sep 22 16:44:54 2014 +0100 xen: arm: move setup_virt_paging to p2m.[ch] from mm.[ch] This file is where most of the P2M logic lives and this function will eventually need to poke at some internals, so move it. This is pure code motion. Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx> Acked-by: Julien Grall <julien.grall@xxxxxxxxxx> --- xen/arch/arm/mm.c | 18 ------------------ xen/arch/arm/p2m.c | 18 ++++++++++++++++++ xen/include/asm-arm/mm.h | 2 -- xen/include/asm-arm/p2m.h | 3 +++ 4 files changed, 21 insertions(+), 20 deletions(-) diff --git a/xen/arch/arm/mm.c b/xen/arch/arm/mm.c index 0294fa8..5cd4e99 100644 --- a/xen/arch/arm/mm.c +++ b/xen/arch/arm/mm.c @@ -411,24 +411,6 @@ void __init arch_init_memory(void) BUG_ON(IS_ERR(dom_cow)); } -void __cpuinit setup_virt_paging(void) -{ - /* Setup Stage 2 address translation */ - /* SH0=11 (Inner-shareable) - * ORGN0=IRGN0=01 (Normal memory, Write-Back Write-Allocate Cacheable) - * SL0=01 (Level-1) - * ARVv7: T0SZ=(1)1000 = -8 (32-(-8) = 40 bit physical addresses) - * ARMv8: T0SZ=01 1000 = 24 (64-24 = 40 bit physical addresses) - * PS=010 == 40 bits - */ -#ifdef CONFIG_ARM_32 - WRITE_SYSREG32(0x80003558, VTCR_EL2); -#else - WRITE_SYSREG32(0x80023558, VTCR_EL2); -#endif - isb(); -} - static inline lpae_t pte_of_xenaddr(vaddr_t va) { paddr_t ma = va + phys_offset; diff --git a/xen/arch/arm/p2m.c b/xen/arch/arm/p2m.c index fa64aa5..a1fef0f 100644 --- a/xen/arch/arm/p2m.c +++ b/xen/arch/arm/p2m.c @@ -1138,6 +1138,24 @@ err: return page; } +void __cpuinit setup_virt_paging(void) +{ + /* Setup Stage 2 address translation */ + /* SH0=11 (Inner-shareable) + * ORGN0=IRGN0=01 (Normal memory, Write-Back Write-Allocate Cacheable) + * SL0=01 (Level-1) + * ARVv7: T0SZ=(1)1000 = -8 (32-(-8) = 40 bit physical addresses) + * ARMv8: T0SZ=01 1000 = 24 (64-24 = 40 bit physical addresses) + * PS=010 == 40 bits + */ +#ifdef CONFIG_ARM_32 + WRITE_SYSREG32(0x80003558, VTCR_EL2); +#else + WRITE_SYSREG32(0x80023558, VTCR_EL2); +#endif + isb(); +} + /* * Local variables: * mode: C diff --git a/xen/include/asm-arm/mm.h b/xen/include/asm-arm/mm.h index 9fa80a4..840a805 100644 --- a/xen/include/asm-arm/mm.h +++ b/xen/include/asm-arm/mm.h @@ -155,8 +155,6 @@ extern void remove_early_mappings(void); extern int __cpuinit init_secondary_pagetables(int cpu); /* Switch secondary CPUS to its own pagetables and finalise MMU setup */ extern void __cpuinit mmu_init_secondary_cpu(void); -/* Second stage paging setup, to be called on all CPUs */ -extern void __cpuinit setup_virt_paging(void); /* Set up the xenheap: up to 1GB of contiguous, always-mapped memory. * Base must be 32MB aligned and size a multiple of 32MB. */ extern void setup_xenheap_mappings(unsigned long base_mfn, unsigned long nr_mfns); diff --git a/xen/include/asm-arm/p2m.h b/xen/include/asm-arm/p2m.h index 5bf7946..999f20a 100644 --- a/xen/include/asm-arm/p2m.h +++ b/xen/include/asm-arm/p2m.h @@ -72,6 +72,9 @@ typedef enum { /* Initialise vmid allocator */ void p2m_vmid_allocator_init(void); +/* Second stage paging setup, to be called on all CPUs */ +void __cpuinit setup_virt_paging(void); + /* Init the datastructures for later use by the p2m code */ int p2m_init(struct domain *d); -- generated by git-patchbot for /home/xen/git/xen.git#master _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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