[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen stable-4.4] vmx: fix save/restore issue with apicv
commit 81b9db19fa454dc5e723d712d8800e865b0f24e5 Author: Yang Zhang <yang.z.zhang@xxxxxxxxx> AuthorDate: Thu Nov 13 09:43:33 2014 +0100 Commit: Jan Beulich <jbeulich@xxxxxxxx> CommitDate: Thu Nov 13 09:43:33 2014 +0100 vmx: fix save/restore issue with apicv This patch fixes two issues: 1. Interrupts on PIR are lost during save/restore. Syncing the PIR into IRR during save will fix it. 2. EOI exit bitmap doesn't set up correctly after restore. Here we will construct the eoi exit bitmap via (IRR | ISR). Though it may cause unnecessary eoi exit of the interrupts that pending in IRR or ISR during save/restore, each pending interrupt only causes one vmexit. The subsequent interrupts will adjust the eoi exit bitmap correctly. So the performance hurt can be ignored. Signed-off-by: Yang Zhang <yang.z.zhang@xxxxxxxxx> Signed-off-by: Olaf Hering <olaf@xxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> master commit: 607e8494c42397fb249191904066cace6ac9a880 master date: 2014-10-27 16:40:18 +0100 --- xen/arch/x86/hvm/vlapic.c | 3 +++ xen/arch/x86/hvm/vmx/vmx.c | 24 ++++++++++++++++++++++++ xen/include/asm-x86/hvm/vlapic.h | 2 ++ 3 files changed, 29 insertions(+), 0 deletions(-) diff --git a/xen/arch/x86/hvm/vlapic.c b/xen/arch/x86/hvm/vlapic.c index bc06010..bd8c63e 100644 --- a/xen/arch/x86/hvm/vlapic.c +++ b/xen/arch/x86/hvm/vlapic.c @@ -1161,6 +1161,9 @@ static int lapic_save_regs(struct domain *d, hvm_domain_context_t *h) for_each_vcpu ( d, v ) { + if ( hvm_funcs.sync_pir_to_irr ) + hvm_funcs.sync_pir_to_irr(v); + s = vcpu_vlapic(v); if ( (rc = hvm_save_entry(LAPIC_REGS, v->vcpu_id, h, s->regs)) != 0 ) break; diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c index b05c88e..a6a850d 100644 --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1530,6 +1530,8 @@ static void vmx_process_isr(int isr, struct vcpu *v) { unsigned long status; u8 old; + unsigned int i; + const struct vlapic *vlapic = vcpu_vlapic(v); if ( isr < 0 ) isr = 0; @@ -1543,6 +1545,28 @@ static void vmx_process_isr(int isr, struct vcpu *v) status |= isr << VMX_GUEST_INTR_STATUS_SVI_OFFSET; __vmwrite(GUEST_INTR_STATUS, status); } + + /* + * Theoretically, only level triggered interrupts can have their + * corresponding bits set in the eoi exit bitmap. That is, the bits + * set in the eoi exit bitmap should also be set in TMR. But a periodic + * timer interrupt does not follow the rule: it is edge triggered, but + * requires its corresponding bit be set in the eoi exit bitmap. So we + * should not construct the eoi exit bitmap based on TMR. + * Here we will construct the eoi exit bitmap via (IRR | ISR). This + * means that EOIs to the interrupts that are set in the IRR or ISR will + * cause VM exits after restoring, regardless of the trigger modes. It + * is acceptable because the subsequent interrupts will set up the eoi + * bitmap correctly. + */ + for ( i = 0x10; i < NR_VECTORS; ++i ) + if ( vlapic_test_vector(i, &vlapic->regs->data[APIC_IRR]) || + vlapic_test_vector(i, &vlapic->regs->data[APIC_ISR]) ) + set_bit(i, v->arch.hvm_vmx.eoi_exit_bitmap); + + for ( i = 0; i < ARRAY_SIZE(v->arch.hvm_vmx.eoi_exit_bitmap); ++i ) + __vmwrite(EOI_EXIT_BITMAP(i), v->arch.hvm_vmx.eoi_exit_bitmap[i]); + vmx_vmcs_exit(v); } diff --git a/xen/include/asm-x86/hvm/vlapic.h b/xen/include/asm-x86/hvm/vlapic.h index 66f0aff..2994920 100644 --- a/xen/include/asm-x86/hvm/vlapic.h +++ b/xen/include/asm-x86/hvm/vlapic.h @@ -58,6 +58,8 @@ #define VEC_POS(v) ((v) % 32) #define REG_POS(v) (((v) / 32) * 0x10) +#define vlapic_test_vector(vec, bitmap) \ + test_bit(VEC_POS(vec), (const uint32_t *)((bitmap) + REG_POS(vec))) #define vlapic_test_and_set_vector(vec, bitmap) \ test_and_set_bit(VEC_POS(vec), (uint32_t *)((bitmap) + REG_POS(vec))) #define vlapic_test_and_clear_vector(vec, bitmap) \ -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.4 _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx http://lists.xensource.com/xen-changelog
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