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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen stable-4.5] README: Rewrap to 70 columns.
commit babb7908db4c52af6343f2ea1e03d632c27ad100
Author: Ian Jackson <ian.jackson@xxxxxxxxxxxxx>
AuthorDate: Tue Jan 6 18:40:19 2015 +0000
Commit: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
CommitDate: Tue Jan 6 13:43:14 2015 -0500
README: Rewrap to 70 columns.
The first paragraph seems to have been wrapped to 70, so do the other
new paragraphs to 70 too for visual consistency.
No non-whitespace change.
Signed-off-by: Ian Jackson <Ian.Jackson@xxxxxxxxxxxxx>
CC: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
---
README | 43 +++++++++++++++++++++++--------------------
1 files changed, 23 insertions(+), 20 deletions(-)
diff --git a/README b/README
index 3863c9e..4a9cac1 100644
--- a/README
+++ b/README
@@ -19,29 +19,32 @@ is freely-distributable Open Source software, released
under the GNU
GPL. Since its initial public release, Xen has grown a large
development community, spearheaded by xen.org (http://www.xen.org).
-The 4.5 release offers a number of improvements, including: improvements for
-large scale machines during bootup and for PCI passthrough; multiple IO-REQ
-servers (many QEMUs for a guest); soft affinity for vCPUs (aka NUMA affinity);
-and API expansion for guest introspection. We also have number of updates for
-CPU specific changes, such as: Broadwell Supervisor Mode Access Prevention;
-Haswell Server Cache QoS Monitoring aka Intel Resource Director Technology;
-further extensions to vAPIC (SandyBridge feature); fixes in AMD microcode
-loading; Data Breaking Extensions; and further MSR masking support on AMD.
-
-On the experimental side we have added a new Real-Time Deferrable Server Based
-CPU Scheduler (rtds), and PVH initial domain (dom0) support for Intel CPUs.
-
-Additionally, 4.5 has a huge update to the ARM code, including support for:
-up to 1TB in guests; up to 8 CPUs; Power State Coordination Interface (0.2)
-to power up and down CPUs; UEFI booting; IOMMU support (SMMUv1); Super Page
-(2MB) support; passthrough of MMIO regions to guests; and lower interrupt
-latency.
-
-The toolstack has expanded to include support for: VM Generation ID (a Windows
-2012 Server requirement); Remus initial support (for high availability)
-in libxl (since xend has been removed); libxenlight JSON support and persistent
-configuration support, and systemd support; and support in QEMU for expanding
-the PCI hole.
+The 4.5 release offers a number of improvements, including:
+improvements for large scale machines during bootup and for PCI
+passthrough; multiple IO-REQ servers (many QEMUs for a guest); soft
+affinity for vCPUs (aka NUMA affinity); and API expansion for guest
+introspection. We also have number of updates for CPU specific
+changes, such as: Broadwell Supervisor Mode Access Prevention; Haswell
+Server Cache QoS Monitoring aka Intel Resource Director Technology;
+further extensions to vAPIC (SandyBridge feature); fixes in AMD
+microcode loading; Data Breaking Extensions; and further MSR masking
+support on AMD.
+
+On the experimental side we have added a new Real-Time Deferrable
+Server Based CPU Scheduler (rtds), and PVH initial domain (dom0)
+support for Intel CPUs.
+
+Additionally, 4.5 has a huge update to the ARM code, including support
+for: up to 1TB in guests; up to 8 CPUs; Power State Coordination
+Interface (0.2) to power up and down CPUs; UEFI booting; IOMMU support
+(SMMUv1); Super Page (2MB) support; passthrough of MMIO regions to
+guests; and lower interrupt latency.
+
+The toolstack has expanded to include support for: VM Generation ID (a
+Windows 2012 Server requirement); Remus initial support (for high
+availability) in libxl (since xend has been removed); libxenlight JSON
+support and persistent configuration support, and systemd support; and
+support in QEMU for expanding the PCI hole.
Lastly, we have removed the Python toolstack (xend).
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.5
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