[Xen-changelog] [xen master] xen/arm: Add Xilinx ZynqMP early printk support

[patchbot@xxxxxxx]

commit d6ccfe6ba053159b0e9c14850de2c5e6a703208c
Author:     Edgar E. Iglesias <edgar.iglesias@xxxxxxxxxx>
AuthorDate: Wed Mar 11 11:19:34 2015 +1000
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Wed Mar 11 12:39:10 2015 +0000

    xen/arm: Add Xilinx ZynqMP early printk support
    
    Reviewed-by: Julien Grall <julien.grall@xxxxxxxxxx>
    Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xxxxxxxxxx>
    Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
 docs/misc/arm/early-printk.txt       |    1 +
 xen/arch/arm/Rules.mk                |    6 ++++
 xen/arch/arm/arm64/debug-cadence.inc |   45 ++++++++++++++++++++++++++++++++++
 3 files changed, 52 insertions(+), 0 deletions(-)

diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
index 859c635..710f07e 100644
--- a/docs/misc/arm/early-printk.txt
+++ b/docs/misc/arm/early-printk.txt
@@ -21,6 +21,7 @@ where mach is the name of the machine:
   - seattle: printk with pl011 for AMD Seattle processor
   - lager: printk with SCIF0 on Renesas R-Car H2 processors
   - thunderx: printk with pl011 for Cavium ThunderX processor
+  - zynqmp: printk with Cadence UART for Xilinx ZynqMP SoCs
 
 The base address and baud rate is hardcoded in xen/arch/arm/Rules.mk,
 see there when adding support for new machines.
diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index 54efa91..818a5bc 100644
--- a/xen/arch/arm/Rules.mk
+++ b/xen/arch/arm/Rules.mk
@@ -118,6 +118,12 @@ EARLY_PRINTK_INC := pl011
 EARLY_UART_BASE_ADDRESS := 0x87e024000000
 endif
 
+ifeq ($(CONFIG_EARLY_PRINTK), zynqmp)
+EARLY_PRINTK_INC := cadence
+EARLY_PRINTK_BAUD := 115200
+EARLY_UART_BASE_ADDRESS := 0xff000000
+endif
+
 ifneq ($(EARLY_PRINTK_INC),)
 EARLY_PRINTK := y
 endif
diff --git a/xen/arch/arm/arm64/debug-cadence.inc 
b/xen/arch/arm/arm64/debug-cadence.inc
new file mode 100644
index 0000000..84dee4c
--- /dev/null
+++ b/xen/arch/arm/arm64/debug-cadence.inc
@@ -0,0 +1,45 @@
+/*
+ * xen/arch/arm/arm64/debug-cadence.S
+ *
+ * Cadence UART specific debug code
+ *
+ * Copyright (c) 2015 Xilinx Inc.
+ * Written by Edgar E. Iglesias.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <asm/asm_defns.h>
+#include <asm/cadence-uart.h>
+
+/* Cadence UART wait UART to be ready to transmit
+ * xb: register which contains the UART base address
+ * c: scratch register number */
+.macro early_uart_ready xb, c
+1:
+        ldrh  w\c, [\xb, #R_UART_SR]
+        tst   w\c, #UART_SR_INTR_TFUL
+        b.ne  1b
+.endm
+
+/* Cadence UART transmit character
+ * xb: register which contains the UART base address
+ * wt: register which contains the character to transmit */
+.macro early_uart_transmit xb, wt
+        strb  \wt, [\xb, #R_UART_TX]
+.endm
+
+/*
+ * Local variables:
+ * mode: ASM
+ * indent-tabs-mode: nil
+ * End:
+ */
--
generated by git-patchbot for /home/xen/git/xen.git#master

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