[Xen-changelog] [xen master] x86/AMD: also print TOM2 when printing MTRR state

[patchbot@xxxxxxx]

commit 637c2646e27848222b9f2c94d663449678b1d7f1
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Fri Jun 26 15:05:50 2015 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Jun 26 15:05:50 2015 +0200

    x86/AMD: also print TOM2 when printing MTRR state
    
    ... to have a complete picture of cachability settings.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/cpu/mtrr/generic.c |   12 ++++++++++++
 1 files changed, 12 insertions(+), 0 deletions(-)

diff --git a/xen/arch/x86/cpu/mtrr/generic.c b/xen/arch/x86/cpu/mtrr/generic.c
index 493830b..935f0a0 100644
--- a/xen/arch/x86/cpu/mtrr/generic.c
+++ b/xen/arch/x86/cpu/mtrr/generic.c
@@ -182,6 +182,18 @@ static void __init print_mtrr_state(const char *level)
                else
                        printk("%s  %u disabled\n", level, i);
        }
+
+       if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD
+           && boot_cpu_data.x86 >= 0xf) {
+               uint64_t syscfg, tom2;
+
+               rdmsrl(MSR_K8_SYSCFG, syscfg);
+               if (syscfg & (1 << 21)) {
+                       rdmsrl(MSR_K8_TOP_MEM2, tom2);
+                       printk("%sTOM2: %012"PRIx64"%s\n", level, tom2,
+                              syscfg & (1 << 22) ? " (WB)" : "");
+               }
+       }
 }
 
 /*  Some BIOS's are fucked and don't set all MTRRs the same!  */
--
generated by git-patchbot for /home/xen/git/xen.git#master

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