[Xen-changelog] [xen master] xen/serial: Move any OMAP specific things to OMAP UART driver

[patchbot@xxxxxxx]

commit 961f129b5d88201c29967b202e0aa38081add1a6
Author:     Oleksandr Tyshchenko <oleksandr.tyshchenko@xxxxxxxxxxxxxxx>
AuthorDate: Thu Nov 5 19:53:06 2015 +0200
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Mon Nov 16 11:13:41 2015 +0000

    xen/serial: Move any OMAP specific things to OMAP UART driver
    
    The 8250-uart.h contains extra serial register definitions
    for the internal UARTs in TI OMAP SoCs which are used in
    OMAP UART driver only.
    In order to clean up code move these definitions to omap-uart.c.
    Also rename some definitions to follow to the UART_OMAP* prefix.
    
    Signed-off-by: Oleksandr Tyshchenko <oleksandr.tyshchenko@xxxxxxxxxxxxxxx>
    CC: Ian Campbell <ian.campbell@xxxxxxxxxx>
    CC: Julien Grall <julien.grall@xxxxxxxxxx>
    CC: Stefano Stabellini <stefano.stabellini@xxxxxxxxxx>
    Cc: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
 xen/drivers/char/omap-uart.c |   25 ++++++++++++++++++++++---
 xen/include/xen/8250-uart.h  |   24 ------------------------
 2 files changed, 22 insertions(+), 27 deletions(-)

diff --git a/xen/drivers/char/omap-uart.c b/xen/drivers/char/omap-uart.c
index d8f64ea..5e666d6 100644
--- a/xen/drivers/char/omap-uart.c
+++ b/xen/drivers/char/omap-uart.c
@@ -25,6 +25,25 @@
 
 #define REG_SHIFT 2
 
+/* Register offsets */
+#define UART_OMAP_EFR    0x02   /* Enhanced feature register */
+#define UART_OMAP_MDR1   0x08   /* Mode definition register 1 */
+#define UART_OMAP_SCR    0x10   /* Supplementary control register */
+#define UART_OMAP_SYSC   0x15   /* System configuration register */
+
+/* Enhanced feature register */
+#define UART_OMAP_EFR_ECB   0x10   /* Enhanced control bit */
+
+/* Mode definition register 1 */
+#define UART_OMAP_MDR1_16X_MODE   0x00   /* UART 16x mode           */
+#define UART_OMAP_MDR1_DISABLE    0x07   /* Disable (default state) */
+
+/* Supplementary control register bitmasks */
+#define UART_OMAP_SCR_RX_TRIG_GRANU1_MASK   (1 << 7)
+
+/* System configuration register */
+#define UART_OMAP_SYSC_DEF_CONF   0x0d   /* autoidle mode, wakeup is enabled */
+
 #define omap_read(uart, off)       readl((uart)->regs + (off<<REG_SHIFT))
 #define omap_write(uart, off, val) writel((val), (uart)->regs + 
(off<<REG_SHIFT))
 
@@ -146,7 +165,7 @@ static void fifo_setup(struct omap_uart *uart)
     /*
      * Load the new FIFO triggers and the new DMA mode bit.
      */
-    omap_write(uart, UART_OMAP_SCR, OMAP_UART_SCR_RX_TRIG_GRANU1_MASK);
+    omap_write(uart, UART_OMAP_SCR, UART_OMAP_SCR_RX_TRIG_GRANU1_MASK);
     /*
      * Restore the UART_OMAP_EFR[4] value.
      */
@@ -196,8 +215,8 @@ static void __init omap_uart_init_preirq(struct serial_port 
*port)
 
     omap_write(uart, UART_OMAP_MDR1, UART_OMAP_MDR1_16X_MODE);
 
-    /* setup iddle mode */
-    omap_write(uart, UART_SYSC, OMAP_UART_SYSC_DEF_CONF);
+    /* setup idle mode */
+    omap_write(uart, UART_OMAP_SYSC, UART_OMAP_SYSC_DEF_CONF);
 }
 
 static void __init omap_uart_init_postirq(struct serial_port *port)
diff --git a/xen/include/xen/8250-uart.h b/xen/include/xen/8250-uart.h
index 304b9dd..c6b62c8 100644
--- a/xen/include/xen/8250-uart.h
+++ b/xen/include/xen/8250-uart.h
@@ -32,7 +32,6 @@
 #define UART_MCR          0x04    /* Modem control        */
 #define UART_LSR          0x05    /* line status          */
 #define UART_MSR          0x06    /* Modem status         */
-#define UART_SYSC         0x15    /* System configuration register */
 #define UART_USR          0x1f    /* Status register (DW) */
 #define UART_DLL          0x00    /* divisor latch (ls) (DLAB=1) */
 #define UART_DLM          0x01    /* divisor latch (ms) (DLAB=1) */
@@ -126,29 +125,6 @@
 #define RESUME_DELAY      MILLISECS(10)
 #define RESUME_RETRIES    100
 
-/* Enhanced feature register */
-#define UART_OMAP_EFR     0x02
-
-#define UART_OMAP_EFR_ECB 0x10 /* Enhanced control bit */
-
-/* Mode definition register 1 */
-#define UART_OMAP_MDR1    0x08
-
-/*
- * These are the definitions for the MDR1 register
- */
-#define UART_OMAP_MDR1_16X_MODE 0x00 /* UART 16x mode           */
-#define UART_OMAP_MDR1_DISABLE  0x07 /* Disable (default state) */
-
-/* Supplementary control register */
-#define UART_OMAP_SCR     0x10
-
-/* SCR register bitmasks */
-#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
-
-/* System configuration register */
-#define OMAP_UART_SYSC_DEF_CONF 0x0d /* autoidle mode, wakeup is enabled */
-
 #endif /* __XEN_8250_UART_H__ */
 
 /*
--
generated by git-patchbot for /home/xen/git/xen.git#master

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