[Xen-changelog] [xen master] xen/arm: vgic-v3: Remove GICR_MOVALLR and GICR_MOVLPIR

[patchbot@xxxxxxx]

commit 49b6d4cf1fa79e764cddea2f412954fa7c347cf3
Author:     Julien Grall <julien.grall@xxxxxxxxxx>
AuthorDate: Wed Nov 18 17:28:01 2015 +0000
Commit:     Ian Campbell <ian.campbell@xxxxxxxxxx>
CommitDate: Wed Nov 25 12:29:28 2015 +0000

    xen/arm: vgic-v3: Remove GICR_MOVALLR and GICR_MOVLPIR
    
    The 2 registers are not described in the software spec (ARM IHI 0069A)
    and their offsets are marked "implementation defined".
    
    Signed-off-by: Julien Grall <julien.grall@xxxxxxxxxx>
    Acked-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
 xen/arch/arm/vgic-v3.c            |   20 ++++++++------------
 xen/include/asm-arm/gic_v3_defs.h |    2 --
 2 files changed, 8 insertions(+), 14 deletions(-)

diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 892104d..28f075a 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -241,13 +241,11 @@ static int __vgic_v3_rdistr_rd_mmio_read(struct vcpu *v, 
mmio_info_t *info,
         *r = vgic_reg32_extract(GICR_SYNCR_NOT_BUSY, info);
         return 1;
 
-    case VREG64(GICR_MOVLPIR):
-        /* WO Read as zero */
-        goto read_as_zero_64;
+    case VREG64(0x0100):
+        goto read_impl_defined;
 
-    case VREG64(GICR_MOVALLR):
-        /* WO Read as zero */
-        goto read_as_zero_64;
+    case VREG64(0x0110):
+        goto read_impl_defined;
 
     case 0xFFD0 ... 0xFFE4:
         /* Implementation defined identification registers */
@@ -348,13 +346,11 @@ static int __vgic_v3_rdistr_rd_mmio_write(struct vcpu *v, 
mmio_info_t *info,
         /* RO */
         goto write_ignore_32;
 
-    case VREG64(GICR_MOVLPIR):
-        /* LPI is not implemented */
-        goto write_ignore_64;
+    case VREG64(0x0100):
+        goto write_impl_defined;
 
-    case VREG64(GICR_MOVALLR):
-        /* LPI is not implemented */
-        goto write_ignore_64;
+    case VREG64(0x0110):
+        goto write_impl_defined;
 
     case 0xFFD0 ... 0xFFE4:
         /* Implementation defined identification registers */
diff --git a/xen/include/asm-arm/gic_v3_defs.h 
b/xen/include/asm-arm/gic_v3_defs.h
index 5a6938c..6d98491 100644
--- a/xen/include/asm-arm/gic_v3_defs.h
+++ b/xen/include/asm-arm/gic_v3_defs.h
@@ -77,8 +77,6 @@
 #define GICR_INVLPIR                 (0x00A0)
 #define GICR_INVALLR                 (0x00B0)
 #define GICR_SYNCR                   (0x00C0)
-#define GICR_MOVLPIR                 (0x100)
-#define GICR_MOVALLR                 (0x0110)
 #define GICR_PIDR2                   GICD_PIDR2
 
 /* GICR for SGI's & PPI's */
--
generated by git-patchbot for /home/xen/git/xen.git#master

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