[Xen-changelog] [xen master] x86: replace redundant MTRR MSR definitions

[patchbot@xxxxxxx]

commit 62c12fa3b15caf54cb8436458a86a1acf42170fd
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Mon Oct 10 12:16:06 2016 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Mon Oct 10 12:16:06 2016 +0200

    x86: replace redundant MTRR MSR definitions
    
    We really should have only one set of #define-s for them.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/e820.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/xen/arch/x86/e820.c b/xen/arch/x86/e820.c
index ef077a5..f4c07e0 100644
--- a/xen/arch/x86/e820.c
+++ b/xen/arch/x86/e820.c
@@ -419,8 +419,6 @@ static void __init clip_to_limit(uint64_t limit, char 
*warnmsg)
 }
 
 /* Conservative estimate of top-of-RAM by looking for MTRR WB regions. */
-#define MSR_MTRRphysBase(reg) (0x200 + 2 * (reg))
-#define MSR_MTRRphysMask(reg) (0x200 + 2 * (reg) + 1)
 static uint64_t __init mtrr_top_of_ram(void)
 {
     uint32_t eax, ebx, ecx, edx;
@@ -477,8 +475,8 @@ static uint64_t __init mtrr_top_of_ram(void)
     top = 0;
     for ( i = 0; i < (uint8_t)mtrr_cap; i++ )
     {
-        rdmsrl(MSR_MTRRphysBase(i), base);
-        rdmsrl(MSR_MTRRphysMask(i), mask);
+        rdmsrl(MSR_IA32_MTRR_PHYSBASE(i), base);
+        rdmsrl(MSR_IA32_MTRR_PHYSMASK(i), mask);
 
         if ( e820_verbose )
             printk(" MTRR[%d]: base %"PRIx64" mask %"PRIx64"\n",
--
generated by git-patchbot for /home/xen/git/xen.git#master

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