[Xen-changelog] [xen master] x86emul: check for LAHF_LM availability

[patchbot@xxxxxxx]

commit bd201eb1681ce6eb1b2d53b4d26a27081956770f
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Wed Dec 14 10:10:39 2016 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed Dec 14 10:10:39 2016 +0100

    x86emul: check for LAHF_LM availability
    
    We can't exclude someone wanting to hide LAHF/SAHF from 64-bit guests.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index 43a6794..2c23e47 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -1299,6 +1299,7 @@ static bool vcpu_has(
 #define vcpu_has_sse4_2()      vcpu_has(         1, ECX, 20, ctxt, ops)
 #define vcpu_has_movbe()       vcpu_has(         1, ECX, 22, ctxt, ops)
 #define vcpu_has_avx()         vcpu_has(         1, ECX, 28, ctxt, ops)
+#define vcpu_has_lahf_lm()     vcpu_has(0x80000001, ECX,  0, ctxt, ops)
 #define vcpu_has_lzcnt()       vcpu_has(0x80000001, ECX,  5, ctxt, ops)
 #define vcpu_has_misalignsse() vcpu_has(0x80000001, ECX,  7, ctxt, ops)
 #define vcpu_has_bmi1()        vcpu_has(         7, EBX,  3, ctxt, ops)
@@ -3234,11 +3235,15 @@ x86_emulate(
     }
 
     case 0x9e: /* sahf */
+        if ( mode_64bit() )
+            vcpu_must_have(lahf_lm);
         *(uint8_t *)&_regs.eflags = (((uint8_t *)&_regs.eax)[1] &
                                      EFLAGS_MASK) | EFLG_MBS;
         break;
 
     case 0x9f: /* lahf */
+        if ( mode_64bit() )
+            vcpu_must_have(lahf_lm);
         ((uint8_t *)&_regs.eax)[1] = (_regs.eflags & EFLAGS_MASK) | EFLG_MBS;
         break;
 
--
generated by git-patchbot for /home/xen/git/xen.git#master

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