[Xen-changelog] [qemu-xen master] target-alpha: Fix interrupt mask for cpu1

[patchbot@xxxxxxx]

commit 424ad8388f89f4202a7836d003273f23ebe04b09
Author:     Richard Henderson <rth@xxxxxxxxxxx>
AuthorDate: Tue Nov 22 16:53:53 2016 +0100
Commit:     Richard Henderson <rth@xxxxxxxxxxx>
CommitDate: Tue Nov 22 16:53:53 2016 +0100

    target-alpha: Fix interrupt mask for cpu1
    
    A typo prevents ISA interrupts from being recognized on cpu0,
    which is where the smp kernel normally wants to see them.
    
    Signed-off-by: Richard Henderson <rth@xxxxxxxxxxx>
---
 hw/alpha/typhoon.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 883db13..f50f5cf 100644
--- a/hw/alpha/typhoon.c
+++ b/hw/alpha/typhoon.c
@@ -376,7 +376,7 @@ static void cchip_write(void *opaque, hwaddr addr,
         break;
     case 0x0240: /* DIM1 */
         /* DIM: Device Interrupt Mask Register, CPU1.  */
-        s->cchip.dim[0] = val;
+        s->cchip.dim[1] = val;
         cpu_irq_change(s->cchip.cpu[1], val & s->cchip.drir);
         break;
 
--
generated by git-patchbot for /home/xen/git/qemu-xen.git#master

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