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[Xen-changelog] [xen stable-4.6] x86/VPMU: clear the overflow status of which counter happened to overflow



commit ce6048f364cb3632df6d978c55bfcd033b569c64
Author:     Luwei Kang <luwei.kang@xxxxxxxxx>
AuthorDate: Wed Jan 18 10:23:33 2017 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed Jan 18 10:23:33 2017 +0100

    x86/VPMU: clear the overflow status of which counter happened to overflow
    
    Just set the corresponding bits of counters which happened to overflow,
    rather than setting all the available bits of IA32_PERF_GLOBAL_OVF_CTRL
    when pmu interrupt happened.
    
    Signed-off-by: Luwei Kang <luwei.kang@xxxxxxxxx>
    Acked-by: Kevin Tian <kevin.tian@xxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    master commit: 7a0c70482580234868fcc53b8d72e31966dc7c52
    master date: 2016-12-13 14:21:26 +0100
---
 xen/arch/x86/cpu/vpmu_intel.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/xen/arch/x86/cpu/vpmu_intel.c b/xen/arch/x86/cpu/vpmu_intel.c
index 80eecc7..5799966 100644
--- a/xen/arch/x86/cpu/vpmu_intel.c
+++ b/xen/arch/x86/cpu/vpmu_intel.c
@@ -818,7 +818,7 @@ static int core2_vpmu_do_interrupt(struct cpu_user_regs 
*regs)
         if ( is_pmc_quirk )
             handle_pmc_quirk(msr_content);
         core2_vpmu_cxt->global_status |= msr_content;
-        msr_content = ~global_ovf_ctrl_mask;
+        msr_content &= ~global_ovf_ctrl_mask;
         wrmsrl(MSR_CORE_PERF_GLOBAL_OVF_CTRL, msr_content);
     }
     else
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.6

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