[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen stable-4.8] xen/arm: gic-v3: Make sure read from ICC_IAR1_EL1 is visible on the redistributor
commit 53c3a7372487e72b98d86a7368616d789d80f12e Author: Julien Grall <julien.grall@xxxxxxx> AuthorDate: Wed Jan 18 18:54:08 2017 +0000 Commit: Stefano Stabellini <sstabellini@xxxxxxxxxx> CommitDate: Wed Jan 18 13:35:01 2017 -0800 xen/arm: gic-v3: Make sure read from ICC_IAR1_EL1 is visible on the redistributor "The effects of reading ICC_IAR0_EL1 and ICC_IAR1_EL1 on the state of a returned INTID are not guaranteed to be visible until after the execution of a DSB". Because of the GIC is an external component, a dsb sy is required. Without it the sysreg read may not have been made visible on the redistributor. Signed-off-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> --- xen/arch/arm/gic-v3.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/xen/arch/arm/gic-v3.c b/xen/arch/arm/gic-v3.c index b8be395..12775f5 100644 --- a/xen/arch/arm/gic-v3.c +++ b/xen/arch/arm/gic-v3.c @@ -459,7 +459,11 @@ static void gicv3_dir_irq(struct irq_desc *irqd) static unsigned int gicv3_read_irq(void) { - return READ_SYSREG32(ICC_IAR1_EL1); + unsigned int irq = READ_SYSREG32(ICC_IAR1_EL1); + + dsb(sy); + + return irq; } static inline uint64_t gicv3_mpidr_to_affinity(int cpu) -- generated by git-patchbot for /home/xen/git/xen.git#stable-4.8 _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxx https://lists.xenproject.org/xen-changelog
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