[Xen-changelog] [xen master] x86/cpufeatures: Hide Instruction Based Sampling from guests

[patchbot@xxxxxxx]

commit c783556d71084c8111ce17304992c2e85f0e0346
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Jan 20 14:48:57 2017 +0000
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Wed Jan 25 10:26:29 2017 +0000

    x86/cpufeatures: Hide Instruction Based Sampling from guests
    
    Xen advertises the IBS feature flag to guests on capable AMD hardware.
    However, the PV path in Xen, and both the PV and HVM paths in libxc
    deliberately clobber the IBS CPUID leaf.
    
    Furthermore, Xen has nothing providing an implementation of the IBS MSRs, so
    guests can't actually use the feature at all.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/cpuid.c                        | 9 +++++----
 xen/include/public/arch-x86/cpufeatureset.h | 2 +-
 2 files changed, 6 insertions(+), 5 deletions(-)

diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 69dc39b..dc4ddd5 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -211,6 +211,8 @@ static void recalculate_misc(struct cpuid_policy *p)
         p->extd.raw[0x9] = EMPTY_LEAF;
 
         zero_leaves(p->extd.raw, 0xb, 0x18);
+
+        p->extd.raw[0x1b] = EMPTY_LEAF; /* IBS - not supported. */
         break;
     }
 }
@@ -727,7 +729,6 @@ static void pv_cpuid(uint32_t leaf, uint32_t subleaf, 
struct cpuid_leaf *res)
 
     case 0x00000005: /* MONITOR/MWAIT */
     case 0x0000000b: /* Extended Topology Enumeration */
-    case 0x8000001b: /* Instruction Based Sampling */
     case 0x8000001c: /* Light Weight Profiling */
     unsupported:
         *res = EMPTY_LEAF;
@@ -737,7 +738,7 @@ static void pv_cpuid(uint32_t leaf, uint32_t subleaf, 
struct cpuid_leaf *res)
     case 0x2 ... 0x3:
     case 0x7 ... 0x9:
     case 0xc ... XSTATE_CPUID:
-    case 0x80000000 ... 0x8000001a:
+    case 0x80000000 ... 0x8000001b:
         ASSERT_UNREACHABLE();
         /* Now handled in guest_cpuid(). */
     }
@@ -833,7 +834,7 @@ static void hvm_cpuid(uint32_t leaf, uint32_t subleaf, 
struct cpuid_leaf *res)
     case 0x2 ... 0x3:
     case 0x7 ... 0x9:
     case 0xc ... XSTATE_CPUID:
-    case 0x80000000 ... 0x8000001a:
+    case 0x80000000 ... 0x8000001b:
         ASSERT_UNREACHABLE();
         /* Now handled in guest_cpuid(). */
     }
@@ -916,7 +917,7 @@ void guest_cpuid(const struct vcpu *v, uint32_t leaf,
         default:
             goto legacy;
 
-        case 0x80000000 ... 0x8000001a:
+        case 0x80000000 ... 0x8000001b:
             *res = p->extd.raw[leaf & 0xffff];
             break;
         }
diff --git a/xen/include/public/arch-x86/cpufeatureset.h 
b/xen/include/public/arch-x86/cpufeatureset.h
index 70f1e30..97dd353 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -172,7 +172,7 @@ XEN_CPUFEATURE(SSE4A,         3*32+ 6) /*A  SSE-4A */
 XEN_CPUFEATURE(MISALIGNSSE,   3*32+ 7) /*A  Misaligned SSE mode */
 XEN_CPUFEATURE(3DNOWPREFETCH, 3*32+ 8) /*A  3DNow prefetch instructions */
 XEN_CPUFEATURE(OSVW,          3*32+ 9) /*   OS Visible Workaround */
-XEN_CPUFEATURE(IBS,           3*32+10) /*S  Instruction Based Sampling */
+XEN_CPUFEATURE(IBS,           3*32+10) /*   Instruction Based Sampling */
 XEN_CPUFEATURE(XOP,           3*32+11) /*A  extended AVX instructions */
 XEN_CPUFEATURE(SKINIT,        3*32+12) /*   SKINIT/STGI instructions */
 XEN_CPUFEATURE(WDT,           3*32+13) /*   Watchdog timer */
--
generated by git-patchbot for /home/xen/git/xen.git#master

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