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[Xen-changelog] [xen stable-4.7] xen/arm32: Add an helper to invalidate all instruction caches



commit de2c7e3913da4e76538afea325dce77a342652e3
Author:     Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
AuthorDate: Mon Aug 22 11:20:03 2016 -0400
Commit:     Stefano Stabellini <sstabellini@xxxxxxxxxx>
CommitDate: Mon Jun 12 13:52:47 2017 -0700

    xen/arm32: Add an helper to invalidate all instruction caches
    
    This is similar to commit fb9d877a9c0f3d4d15db8f6e0c5506ea641862c6
    "xen/arm64: Add an helper to invalidate all instruction caches"
    except it is on ARM32 side.
    
    When we are flushing the cache we are most likely also want
    to flush the branch predictor too. Hence we add this.
    
    And we also need to follow this with dsb()/isb() which are
    memory barriers().
    
    Reviewed-by: Julien Grall <julien.grall@xxxxxxx>
    Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@xxxxxxxxxx>
    master-commit-id: efed19238c1bf3bb85989648a307ba3232ad96f4
---
 xen/include/asm-arm/arm32/page.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/xen/include/asm-arm/arm32/page.h b/xen/include/asm-arm/arm32/page.h
index bccdbfc..ea4b312 100644
--- a/xen/include/asm-arm/arm32/page.h
+++ b/xen/include/asm-arm/arm32/page.h
@@ -30,6 +30,22 @@ static inline void write_pte(lpae_t *p, lpae_t pte)
 #define __clean_and_invalidate_dcache_one(R) STORE_CP32(R, DCCIMVAC)
 
 /*
+ * Invalidate all instruction caches in Inner Shareable domain to PoU.
+ * We also need to flush the branch predictor for ARMv7 as it may be
+ * architecturally visible to the software (see B2.2.4 in ARM DDI 0406C.b).
+ */
+static inline void invalidate_icache(void)
+{
+    asm volatile (
+        CMD_CP32(ICIALLUIS)     /* Flush I-cache. */
+        CMD_CP32(BPIALLIS)      /* Flush branch predictor. */
+        : : : "memory");
+
+    dsb(ish);                   /* Ensure completion of the flush I-cache */
+    isb();                      /* Synchronize fetched instruction stream. */
+}
+
+/*
  * Flush all hypervisor mappings from the TLB and branch predictor of
  * the local processor.
  *
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.7

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