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[Xen-changelog] [xen stable-4.9] x86emul: correct VEX.W handling for non-64-bit VPINSRD



commit a568e25a38e55d15ca8b003e281ce9bc28fcee24
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Fri Oct 6 14:56:11 2017 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Oct 6 14:56:11 2017 +0200

    x86emul: correct VEX.W handling for non-64-bit VPINSRD
    
    Going though the XED commits from the last couple of months made me
    notice that VPINSRD, other than VPEXTRD, does not clear VEX.W for non-
    64-bit modes, leading to an insertion of stray 32-bits of zero in case
    the original instruction had the bit set.
    
    Also remove a pointless fall-through in VPEXTRW handling, bringing
    things in line with VPINSRW.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    master commit: 9c2babd05a213f8802e3cc1c64a2af932b5cbd7d
    master date: 2017-09-05 17:31:01 +0200
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index e3b9b51..30a8f13 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -6744,10 +6744,9 @@ x86_emulate(
         ea.type = OP_MEM;
         goto simd_0f_int_imm8;
 
+    CASE_SIMD_PACKED_INT(0x0f, 0xc5):      /* pextrw $imm8,{,x}mm,reg */
     case X86EMUL_OPC_VEX_66(0x0f, 0xc5):   /* vpextrw $imm8,xmm,reg */
         generate_exception_if(vex.l, EXC_UD);
-        /* fall through */
-    CASE_SIMD_PACKED_INT(0x0f, 0xc5):      /* pextrw $imm8,{,x}mm,reg */
         opc = init_prefixes(stub);
         opc[0] = b;
         /* Convert GPR destination to %rAX. */
@@ -7526,6 +7525,8 @@ x86_emulate(
     case X86EMUL_OPC_VEX_66(0x0f3a, 0x20): /* vpinsrb $imm8,r32/m8,xmm,xmm */
     case X86EMUL_OPC_VEX_66(0x0f3a, 0x22): /* vpinsr{d,q} $imm8,r/m,xmm,xmm */
         generate_exception_if(vex.l, EXC_UD);
+        if ( !mode_64bit() )
+            vex.w = 0;
         memcpy(mmvalp, &src.val, op_bytes);
         ea.type = OP_MEM;
         op_bytes = src.bytes;
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.9

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