[Xen-changelog] [xen stable-4.9] x86: Avoid corruption on migrate for vcpus using CPUID Faulting

[patchbot@xxxxxxx]

commit 186c3c6e9467f3d22e83723c07fb106d8be6b60f
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Thu Feb 8 12:26:54 2018 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Thu Feb 8 12:26:54 2018 +0100

    x86: Avoid corruption on migrate for vcpus using CPUID Faulting
    
    Xen 4.8 and later virtualises CPUID Faulting support for guests.  However, 
the
    value of MSR_MISC_FEATURES_ENABLES is omitted from the vcpu state, meaning
    that the current cpuid faulting setting is lost on migrate/suspend/resume.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>
    master commit: b90f86be161c74df8cb69c98d9f22885d9d87114
    master date: 2017-12-01 18:09:48 +0000
---
 xen/arch/x86/domctl.c      | 18 ++++++++++++++++++
 xen/arch/x86/hvm/vmx/vmx.c | 13 ++++++++++++-
 2 files changed, 30 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/domctl.c b/xen/arch/x86/domctl.c
index d6b2063..0aa7dae 100644
--- a/xen/arch/x86/domctl.c
+++ b/xen/arch/x86/domctl.c
@@ -1325,6 +1325,19 @@ long arch_do_domctl(
                     }
                 }
 
+                if ( v->arch.cpuid_faulting )
+                {
+                    if ( i < vmsrs->msr_count && !ret )
+                    {
+                        msr.index = MSR_INTEL_MISC_FEATURES_ENABLES;
+                        msr.reserved = 0;
+                        msr.value = MSR_MISC_FEATURES_CPUID_FAULTING;
+                        if ( copy_to_guest_offset(vmsrs->msrs, i, &msr, 1) )
+                            ret = -EFAULT;
+                    }
+                    ++i;
+                }
+
                 vcpu_unpause(v);
 
                 if ( i > vmsrs->msr_count && !ret )
@@ -1352,6 +1365,11 @@ long arch_do_domctl(
 
                 switch ( msr.index )
                 {
+                case MSR_INTEL_MISC_FEATURES_ENABLES:
+                    v->arch.cpuid_faulting = !!(msr.value &
+                                                
MSR_MISC_FEATURES_CPUID_FAULTING);
+                    continue;
+
                 case MSR_AMD64_DR0_ADDRESS_MASK:
                     if ( !boot_cpu_has(X86_FEATURE_DBEXT) ||
                          (msr.value >> 32) )
diff --git a/xen/arch/x86/hvm/vmx/vmx.c b/xen/arch/x86/hvm/vmx/vmx.c
index 465c2dc..c5cf72c 100644
--- a/xen/arch/x86/hvm/vmx/vmx.c
+++ b/xen/arch/x86/hvm/vmx/vmx.c
@@ -897,7 +897,8 @@ static int vmx_load_vmcs_ctxt(struct vcpu *v, struct 
hvm_hw_cpu *ctxt)
 
 static unsigned int __init vmx_init_msr(void)
 {
-    return (cpu_has_mpx && cpu_has_vmx_mpx) +
+    return 1 /* MISC_FEATURES_ENABLES */ +
+           (cpu_has_mpx && cpu_has_vmx_mpx) +
            (cpu_has_xsaves && cpu_has_vmx_xsaves);
 }
 
@@ -905,6 +906,12 @@ static void vmx_save_msr(struct vcpu *v, struct hvm_msr 
*ctxt)
 {
     vmx_vmcs_enter(v);
 
+    if ( v->arch.cpuid_faulting )
+    {
+        ctxt->msr[ctxt->count].index = MSR_INTEL_MISC_FEATURES_ENABLES;
+        ctxt->msr[ctxt->count++].val = MSR_MISC_FEATURES_CPUID_FAULTING;
+    }
+
     if ( cpu_has_mpx && cpu_has_vmx_mpx )
     {
         __vmread(GUEST_BNDCFGS, &ctxt->msr[ctxt->count].val);
@@ -933,6 +940,10 @@ static int vmx_load_msr(struct vcpu *v, struct hvm_msr 
*ctxt)
     {
         switch ( ctxt->msr[i].index )
         {
+        case MSR_INTEL_MISC_FEATURES_ENABLES:
+            v->arch.cpuid_faulting = !!(ctxt->msr[i].val &
+                                        MSR_MISC_FEATURES_CPUID_FAULTING);
+            break;
         case MSR_IA32_BNDCFGS:
             if ( cpu_has_mpx && cpu_has_vmx_mpx &&
                  is_canonical_address(ctxt->msr[i].val) &&
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.9

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