[Xen-changelog] [xen staging] x86/spec-ctrl: Rename ARCH_CAPS.SSBD_NO to SSB_NO

[patchbot@xxxxxxx]

commit ebdead29672d68fb3f44c2074f05cc0d72ffa83f
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Wed Mar 28 15:21:39 2018 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Tue May 22 11:24:57 2018 +0100

    x86/spec-ctrl: Rename ARCH_CAPS.SSBD_NO to SSB_NO
    
    A last-minute rename of the feature occured, and the patch committed to
    staging was unfortunately stale.  Correct it.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
    Release-acked-by: Juergen Gross <jgross@xxxxxxxx>
---
 xen/arch/x86/spec_ctrl.c        | 2 +-
 xen/include/asm-x86/msr-index.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/arch/x86/spec_ctrl.c b/xen/arch/x86/spec_ctrl.c
index 2ccada2f65..7db6e51351 100644
--- a/xen/arch/x86/spec_ctrl.c
+++ b/xen/arch/x86/spec_ctrl.c
@@ -216,7 +216,7 @@ static void __init print_details(enum ind_thunk thunk, 
uint64_t caps)
            (caps & ARCH_CAPABILITIES_IBRS_ALL)      ? " IBRS_ALL"  : "",
            (caps & ARCH_CAPABILITIES_RDCL_NO)       ? " RDCL_NO"   : "",
            (caps & ARCH_CAPS_RSBA)                  ? " RSBA"      : "",
-           (caps & ARCH_CAPS_SSBD_NO)               ? " SSBD_NO"   : "");
+           (caps & ARCH_CAPS_SSB_NO)                ? " SSB_NO"    : "");
 
     /* Compiled-in support which pertains to BTI mitigations. */
     if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) )
diff --git a/xen/include/asm-x86/msr-index.h b/xen/include/asm-x86/msr-index.h
index 0612a96749..8fbccc88a7 100644
--- a/xen/include/asm-x86/msr-index.h
+++ b/xen/include/asm-x86/msr-index.h
@@ -47,7 +47,7 @@
 #define ARCH_CAPABILITIES_RDCL_NO      (_AC(1, ULL) << 0)
 #define ARCH_CAPABILITIES_IBRS_ALL     (_AC(1, ULL) << 1)
 #define ARCH_CAPS_RSBA                 (_AC(1, ULL) << 2)
-#define ARCH_CAPS_SSBD_NO              (_AC(1, ULL) << 4)
+#define ARCH_CAPS_SSB_NO               (_AC(1, ULL) << 4)
 
 /* Intel MSRs. Some also available on other CPUs */
 #define MSR_IA32_PERFCTR0              0x000000c1
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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