[Xen-changelog] [xen staging] x86/msr: Use the architectural layout for MSR_{MISC_ENABLES, PLATFORM_INFO}

[patchbot@xxxxxxx]

commit b4ac4bc410222d221dc46a74ac71efaa7b32d57c
Author:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Wed Jun 27 12:34:47 2018 +0100
Commit:     Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Mon Jul 2 18:04:21 2018 +0100

    x86/msr: Use the architectural layout for MSR_{MISC_ENABLES,PLATFORM_INFO}
    
    This simplifies future interactions with the toolstack, by removing the need
    for per-MSR custom accessors when shuffling data in/out of a policy.
    
    Use a 32bit raw backing integer (for simplicity), and use a bitfield to move
    the cpuid_faulting field to its appropriate position.
    
    Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
    Reviewed-by: Sergey Dyasli <sergey.dyasli@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
 xen/arch/x86/msr.c        |  9 +++------
 xen/include/asm-x86/msr.h | 15 +++++++++++----
 2 files changed, 14 insertions(+), 10 deletions(-)

diff --git a/xen/arch/x86/msr.c b/xen/arch/x86/msr.c
index 6599f10d32..d035c67d4c 100644
--- a/xen/arch/x86/msr.c
+++ b/xen/arch/x86/msr.c
@@ -139,8 +139,7 @@ int guest_rdmsr(const struct vcpu *v, uint32_t msr, 
uint64_t *val)
         break;
 
     case MSR_INTEL_PLATFORM_INFO:
-        *val = (uint64_t)dp->plaform_info.cpuid_faulting <<
-               _MSR_PLATFORM_INFO_CPUID_FAULTING;
+        *val = dp->plaform_info.raw;
         break;
 
     case MSR_ARCH_CAPABILITIES:
@@ -148,8 +147,7 @@ int guest_rdmsr(const struct vcpu *v, uint32_t msr, 
uint64_t *val)
         goto gp_fault;
 
     case MSR_INTEL_MISC_FEATURES_ENABLES:
-        *val = (uint64_t)vp->misc_features_enables.cpuid_faulting <<
-               _MSR_MISC_FEATURES_CPUID_FAULTING;
+        *val = vp->misc_features_enables.raw;
         break;
 
     default:
@@ -240,8 +238,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
         if ( val & rsvd )
             goto gp_fault;
 
-        vp->misc_features_enables.cpuid_faulting =
-            val & MSR_MISC_FEATURES_CPUID_FAULTING;
+        vp->misc_features_enables.raw = val;
 
         if ( v == curr && is_hvm_domain(d) && cpu_has_cpuid_faulting &&
              (old_cpuid_faulting ^ vp->misc_features_enables.cpuid_faulting) )
diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h
index 627b7ced93..68ee7ea17a 100644
--- a/xen/include/asm-x86/msr.h
+++ b/xen/include/asm-x86/msr.h
@@ -268,8 +268,12 @@ struct msr_domain_policy
      * guests so can be offered unconditionally, while support for PV guests
      * is dependent on real hardware support.
      */
-    struct {
-        bool cpuid_faulting;
+    union {
+        uint32_t raw;
+        struct {
+            uint32_t :31;
+            bool cpuid_faulting:1;
+        };
     } plaform_info;
 };
 
@@ -301,8 +305,11 @@ struct msr_vcpu_policy
      * unconditionally.  The CPUID Faulting bit is the only writeable bit, and
      * only if enumerated by MSR_PLATFORM_INFO.
      */
-    struct {
-        bool cpuid_faulting;
+    union {
+        uint32_t raw;
+        struct {
+            bool cpuid_faulting:1;
+        };
     } misc_features_enables;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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