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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen stable-4.9] x86/CPUID: don't override tool stack decision to hide STIBP
commit 8cdaac2d39e2c089255f878145c690ff1f3ec6f9
Author: Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Wed Jul 4 12:34:36 2018 +0200
Commit: Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Wed Jul 4 12:34:36 2018 +0200
x86/CPUID: don't override tool stack decision to hide STIBP
Other than in the feature sets, where we indeed want to offer the
feature even if not enumerated on hardware, we shouldn't dictate the
feature being available if tool stack or host admin have decided to not
expose it (for whatever [questionable?] reason). That feature set side
override is sufficient to achieve the intended guest side safety
property (in offering - by default - STIBP independent of actual
availability in hardware).
Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
master commit: 06f542f8f2e446c01bd0edab51e9450af7f6e05b
master date: 2018-05-29 12:39:24 +0200
---
xen/arch/x86/cpuid.c | 8 --------
xen/include/public/arch-x86/cpufeatureset.h | 2 +-
2 files changed, 1 insertion(+), 9 deletions(-)
diff --git a/xen/arch/x86/cpuid.c b/xen/arch/x86/cpuid.c
index 83348b508e..e67f8a351b 100644
--- a/xen/arch/x86/cpuid.c
+++ b/xen/arch/x86/cpuid.c
@@ -625,14 +625,6 @@ void recalculate_cpuid_policy(struct domain *d)
recalculate_xstate(p);
recalculate_misc(p);
- /*
- * Override STIBP to match IBRS. Guests can safely use STIBP
- * functionality on non-HT hardware, but can't necesserily protect
- * themselves from SP2/Spectre/Branch Target Injection if STIBP is hidden
- * on HT-capable hardware.
- */
- p->feat.stibp = p->feat.ibrsb;
-
for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i )
{
if ( p->cache.subleaf[i].type >= 1 &&
diff --git a/xen/include/public/arch-x86/cpufeatureset.h
b/xen/include/public/arch-x86/cpufeatureset.h
index f2baea445f..225770a818 100644
--- a/xen/include/public/arch-x86/cpufeatureset.h
+++ b/xen/include/public/arch-x86/cpufeatureset.h
@@ -242,7 +242,7 @@ XEN_CPUFEATURE(IBPB, 8*32+12) /*A IBPB support
only (no IBRS, used by
XEN_CPUFEATURE(AVX512_4VNNIW, 9*32+ 2) /*A AVX512 Neural Network Instructions
*/
XEN_CPUFEATURE(AVX512_4FMAPS, 9*32+ 3) /*A AVX512 Multiply Accumulation
Single Precision */
XEN_CPUFEATURE(IBRSB, 9*32+26) /*A IBRS and IBPB support (used by
Intel) */
-XEN_CPUFEATURE(STIBP, 9*32+27) /*A! STIBP */
+XEN_CPUFEATURE(STIBP, 9*32+27) /*A STIBP */
XEN_CPUFEATURE(ARCH_CAPS, 9*32+29) /* IA32_ARCH_CAPABILITIES MSR */
XEN_CPUFEATURE(SSBD, 9*32+31) /*A MSR_SPEC_CTRL.SSBD available */
--
generated by git-patchbot for /home/xen/git/xen.git#stable-4.9
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