[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen staging] amd/pvh: enable ACPI C1E disable quirk on PVH Dom0
commit ff22dad92a5e3aa4b3b6dcfc74759b6dea483d56 Author: Roger Pau Monne <roger.pau@xxxxxxxxxx> AuthorDate: Thu Nov 8 15:23:58 2018 +0100 Commit: Wei Liu <wei.liu2@xxxxxxxxxx> CommitDate: Thu Nov 8 16:40:20 2018 +0000 amd/pvh: enable ACPI C1E disable quirk on PVH Dom0 PV Dom0 has a quirk for some AMD processors, where enabling ACPI can also enable C1E mode. Apply the same workaround as done on PV for a PVH Dom0, which consist on trapping accesses to the SMI command IO port and disabling C1E if ACPI is enabled. Reported-by: Jan Beulich <jbeulich@xxxxxxxx> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx> Reviewed-by: Wei Liu <wei.liu2@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/cpu/amd.c | 11 ++++++++--- xen/arch/x86/dom0_build.c | 5 +++++ xen/arch/x86/hvm/svm/svm.c | 19 +++++++++++++++++++ xen/include/asm-x86/amd.h | 3 +++ 4 files changed, 35 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/cpu/amd.c b/xen/arch/x86/cpu/amd.c index c394c1c2ec..8895c25682 100644 --- a/xen/arch/x86/cpu/amd.c +++ b/xen/arch/x86/cpu/amd.c @@ -44,6 +44,9 @@ integer_param("cpuid_mask_thermal_ecx", opt_cpuid_mask_thermal_ecx); s8 __read_mostly opt_allow_unsafe; boolean_param("allow_unsafe", opt_allow_unsafe); +/* Signal whether the ACPI C1E quirk is required. */ +bool __read_mostly amd_acpi_c1e_quirk; + static inline int rdmsr_amd_safe(unsigned int msr, unsigned int *lo, unsigned int *hi) { @@ -443,7 +446,7 @@ static void disable_c1e(void *unused) smp_processor_id(), msr_content); } -static void check_disable_c1e(unsigned int port, u8 value) +void amd_check_disable_c1e(unsigned int port, u8 value) { /* C1E is sometimes enabled during entry to ACPI mode. */ if ((port == acpi_smi_cmd) && (value == acpi_enable_value)) @@ -627,8 +630,10 @@ static void init_amd(struct cpuinfo_x86 *c) { case 0xf ... 0x17: disable_c1e(NULL); - if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value)) - pv_post_outb_hook = check_disable_c1e; + if (acpi_smi_cmd && (acpi_enable_value | acpi_disable_value)) { + pv_post_outb_hook = amd_check_disable_c1e; + amd_acpi_c1e_quirk = true; + } break; } diff --git a/xen/arch/x86/dom0_build.c b/xen/arch/x86/dom0_build.c index 038e37132a..5e2ad4bd56 100644 --- a/xen/arch/x86/dom0_build.c +++ b/xen/arch/x86/dom0_build.c @@ -12,6 +12,7 @@ #include <xen/sched-if.h> #include <xen/softirq.h> +#include <asm/amd.h> #include <asm/dom0_build.h> #include <asm/guest.h> #include <asm/hpet.h> @@ -435,9 +436,13 @@ int __init dom0_setup_permissions(struct domain *d) rc |= ioports_deny_access(d, 0xcfc, 0xcff); #ifdef CONFIG_HVM if ( is_hvm_domain(d) ) + { /* HVM debug console IO port. */ rc |= ioports_deny_access(d, XEN_HVM_DEBUGCONS_IOPORT, XEN_HVM_DEBUGCONS_IOPORT); + if ( amd_acpi_c1e_quirk ) + rc |= ioports_deny_access(d, acpi_smi_cmd, acpi_smi_cmd); + } #endif /* Command-line I/O ranges. */ process_dom0_ioports_disable(d); diff --git a/xen/arch/x86/hvm/svm/svm.c b/xen/arch/x86/hvm/svm/svm.c index 5d00256aaa..07a5ed8011 100644 --- a/xen/arch/x86/hvm/svm/svm.c +++ b/xen/arch/x86/hvm/svm/svm.c @@ -1273,6 +1273,22 @@ void svm_host_osvw_init() spin_unlock(&osvw_lock); } +static int acpi_c1e_quirk(int dir, unsigned int port, unsigned int bytes, + uint32_t *val) +{ + ASSERT(bytes == 1 && port == acpi_smi_cmd); + + if ( dir == IOREQ_READ ) + *val = inb(port); + else + { + outb(*val, port); + amd_check_disable_c1e(port, *val); + } + + return X86EMUL_OKAY; +} + static int svm_domain_initialise(struct domain *d) { static const struct arch_csw csw = { @@ -1285,6 +1301,9 @@ static int svm_domain_initialise(struct domain *d) svm_guest_osvw_init(d); + if ( is_hardware_domain(d) && amd_acpi_c1e_quirk ) + register_portio_handler(d, acpi_smi_cmd, 1, acpi_c1e_quirk); + return 0; } diff --git a/xen/include/asm-x86/amd.h b/xen/include/asm-x86/amd.h index e9867c7823..a82382e6bf 100644 --- a/xen/include/asm-x86/amd.h +++ b/xen/include/asm-x86/amd.h @@ -148,4 +148,7 @@ extern s8 opt_allow_unsafe; void fam10h_check_enable_mmcfg(void); void check_enable_amd_mmconf_dmi(void); +extern bool amd_acpi_c1e_quirk; +void amd_check_disable_c1e(unsigned int port, u8 value); + #endif /* __AMD_H__ */ -- generated by git-patchbot for /home/xen/git/xen.git#staging _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/xen-changelog
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