[Xen-changelog] [xen master] amd/iommu: fix present bit checking when clearing PTE

[patchbot@xxxxxxx]

commit ba9b5a09da01960848ae9d30a34fb9073efb4f13
Author:     Roger Pau Monné <roger.pau@xxxxxxxxxx>
AuthorDate: Fri Jan 25 09:48:38 2019 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Jan 25 09:48:38 2019 +0100

    amd/iommu: fix present bit checking when clearing PTE
    
    The current check for the present bit is wrong, since the present bit
    is located in the low part of the entry.
    
    Fixes: e8afe1124cc1 ("iommu: elide flushing for higher order map/unmap 
operations")
    Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
    Reviewed-by: Paul Durrant <paul.durrant@xxxxxxxxxx>
    Reviewed-by: Brian Woods <brian.woods@xxxxxxx>
    Release-acked-by: Juergen Gross <jgross@xxxxxxxx>
---
 xen/drivers/passthrough/amd/iommu_map.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/xen/drivers/passthrough/amd/iommu_map.c 
b/xen/drivers/passthrough/amd/iommu_map.c
index 99ac0a6862..67329b0c95 100644
--- a/xen/drivers/passthrough/amd/iommu_map.c
+++ b/xen/drivers/passthrough/amd/iommu_map.c
@@ -39,15 +39,13 @@ static unsigned int clear_iommu_pte_present(unsigned long 
l1_mfn,
                                             unsigned long dfn)
 {
     uint64_t *table, *pte;
-    uint32_t entry;
     unsigned int flush_flags;
 
     table = map_domain_page(_mfn(l1_mfn));
 
     pte = (table + pfn_to_pde_idx(dfn, 1));
-    entry = *pte >> 32;
 
-    flush_flags = get_field_from_reg_u32(entry, IOMMU_PTE_PRESENT_MASK,
+    flush_flags = get_field_from_reg_u32(*pte, IOMMU_PTE_PRESENT_MASK,
                                          IOMMU_PTE_PRESENT_SHIFT) ?
                                          IOMMU_FLUSHF_modified : 0;
 
--
generated by git-patchbot for /home/xen/git/xen.git#master

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