[Xen-changelog] [xen staging] xen/arm64: head: Move assembly switch to the runtime PT in secondary CPUs path

[patchbot@xxxxxxx]

commit 9c20f63c1b6da8a906ab985f21472c9e55865b07
Author:     Julien Grall <julien.grall@xxxxxxx>
AuthorDate: Mon Apr 15 12:14:38 2019 +0100
Commit:     Julien Grall <julien.grall@xxxxxxx>
CommitDate: Wed Jul 31 20:33:38 2019 +0100

    xen/arm64: head: Move assembly switch to the runtime PT in secondary CPUs 
path
    
    The assembly switch to the runtime PT is only necessary for the
    secondary CPUs. So move the code in the secondary CPUs path.
    
    While this is definitely not compliant with the Arm Arm as we are
    switching between two differents set of page-tables without turning off
    the MMU. Turning off the MMU is impossible here as the ID map may clash
    with other mappings in the runtime page-tables. This will require more
    rework to avoid the problem. So for now add a TODO in the code.
    
    Signed-off-by: Julien Grall <julien.grall@xxxxxxx>
    Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
---
 xen/arch/arm/arm64/head.S | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/xen/arch/arm/arm64/head.S b/xen/arch/arm/arm64/head.S
index 63563ef5e3..4ce4895a0d 100644
--- a/xen/arch/arm/arm64/head.S
+++ b/xen/arch/arm/arm64/head.S
@@ -344,6 +344,23 @@ GLOBAL(init_secondary)
         br    x0
 secondary_switched:
         bl    setup_fixmap
+
+        /*
+         * Non-boot CPUs need to move on to the proper pagetables, which were
+         * setup in init_secondary_pagetables.
+         *
+         * XXX: This is not compliant with the Arm Arm.
+         */
+        ldr   x4, =init_ttbr         /* VA of TTBR0_EL2 stashed by CPU 0 */
+        ldr   x4, [x4]               /* Actual value */
+        dsb   sy
+        msr   TTBR0_EL2, x4
+        dsb   sy
+        isb
+        tlbi  alle2
+        dsb   sy                     /* Ensure completion of TLB flush */
+        isb
+
         b     launch
 ENDPROC(init_secondary)
 
@@ -650,23 +667,6 @@ ENDPROC(setup_fixmap)
 launch:
         PRINT("- Ready -\r\n")
 
-        /* The boot CPU should go straight into C now */
-        cbz   x22, 1f
-
-        /* Non-boot CPUs need to move on to the proper pagetables, which were
-         * setup in init_secondary_pagetables. */
-
-        ldr   x4, =init_ttbr         /* VA of TTBR0_EL2 stashed by CPU 0 */
-        ldr   x4, [x4]               /* Actual value */
-        dsb   sy
-        msr   TTBR0_EL2, x4
-        dsb   sy
-        isb
-        tlbi  alle2
-        dsb   sy                     /* Ensure completion of TLB flush */
-        isb
-
-1:
         ldr   x0, =init_data
         add   x0, x0, #INITINFO_stack /* Find the boot-time stack */
         ldr   x0, [x0]
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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