[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen master] xen/arm: types: Specify the zero padding in the definition of PRIregister
commit af156ff0859c8d362a5706640614c9d10f62adf2 Author: Julien Grall <julien.grall@xxxxxxx> AuthorDate: Thu May 16 23:39:36 2019 +0100 Commit: Julien Grall <julien.grall@xxxxxxx> CommitDate: Wed Jul 31 20:19:23 2019 +0100 xen/arm: types: Specify the zero padding in the definition of PRIregister The definition of PRIregister varies between Arm32 and Arm64 (32-bit vs 64-bit). However, some of the users uses the wrong padding and others are not using padding at all. For more consistency, the padding is now moved into the PRIregister and varies depending on the architecture. Signed-by: Julien Grall <julien.grall@xxxxxxx> Reviewed-by: Volodymyr Babchuk <volodymyr_babchuk@xxxxxxxx> Acked-by: Stefano Stabellini <sstabellini@xxxxxxxxxx> --- xen/arch/arm/traps.c | 10 +++++----- xen/include/asm-arm/types.h | 4 ++-- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c index ef37ca6bde..f062ae6f6a 100644 --- a/xen/arch/arm/traps.c +++ b/xen/arch/arm/traps.c @@ -797,7 +797,7 @@ static void show_registers_32(const struct cpu_user_regs *regs, if ( guest_mode ) { - printk("USR: SP: %08"PRIx32" LR: %08"PRIregister"\n", + printk("USR: SP: %08"PRIx32" LR: %"PRIregister"\n", regs->sp_usr, regs->lr); printk("SVC: SP: %08"PRIx32" LR: %08"PRIx32" SPSR:%08"PRIx32"\n", regs->sp_svc, regs->lr_svc, regs->spsr_svc); @@ -815,7 +815,7 @@ static void show_registers_32(const struct cpu_user_regs *regs, #ifndef CONFIG_ARM_64 else { - printk("HYP: SP: %08"PRIx32" LR: %08"PRIregister"\n", regs->sp, regs->lr); + printk("HYP: SP: %08"PRIx32" LR: %"PRIregister"\n", regs->sp, regs->lr); } #endif printk("\n"); @@ -823,7 +823,7 @@ static void show_registers_32(const struct cpu_user_regs *regs, if ( guest_mode ) { printk(" SCTLR: %"PRIregister"\n", ctxt->sctlr_el1); - printk(" TCR: %08"PRIregister"\n", ctxt->tcr_el1); + printk(" TCR: %"PRIregister"\n", ctxt->tcr_el1); printk(" TTBR0: %016"PRIx64"\n", ctxt->ttbr0_el1); printk(" TTBR1: %016"PRIx64"\n", ctxt->ttbr1_el1); printk(" IFAR: %08"PRIx32", IFSR: %08"PRIx32"\n" @@ -895,7 +895,7 @@ static void show_registers_64(const struct cpu_user_regs *regs, printk(" FAR_EL1: %016"PRIx64"\n", ctxt->far); printk("\n"); printk(" SCTLR_EL1: %"PRIregister"\n", ctxt->sctlr_el1); - printk(" TCR_EL1: %08"PRIregister"\n", ctxt->tcr_el1); + printk(" TCR_EL1: %"PRIregister"\n", ctxt->tcr_el1); printk(" TTBR0_EL1: %016"PRIx64"\n", ctxt->ttbr0_el1); printk(" TTBR1_EL1: %016"PRIx64"\n", ctxt->ttbr1_el1); printk("\n"); @@ -934,7 +934,7 @@ static void _show_registers(const struct cpu_user_regs *regs, printk("\n"); printk(" SCTLR_EL2: %08"PRIx32"\n", READ_SYSREG32(SCTLR_EL2)); - printk(" HCR_EL2: %016"PRIregister"\n", READ_SYSREG(HCR_EL2)); + printk(" HCR_EL2: %"PRIregister"\n", READ_SYSREG(HCR_EL2)); printk(" TTBR0_EL2: %016"PRIx64"\n", READ_SYSREG64(TTBR0_EL2)); printk("\n"); printk(" ESR_EL2: %08"PRIx32"\n", regs->hsr); diff --git a/xen/include/asm-arm/types.h b/xen/include/asm-arm/types.h index 30f95078cb..89aae25ffe 100644 --- a/xen/include/asm-arm/types.h +++ b/xen/include/asm-arm/types.h @@ -41,7 +41,7 @@ typedef u64 paddr_t; #define INVALID_PADDR (~0ULL) #define PRIpaddr "016llx" typedef u32 register_t; -#define PRIregister "x" +#define PRIregister "08x" #elif defined (CONFIG_ARM_64) typedef signed long s64; typedef unsigned long u64; @@ -51,7 +51,7 @@ typedef u64 paddr_t; #define INVALID_PADDR (~0UL) #define PRIpaddr "016lx" typedef u64 register_t; -#define PRIregister "lx" +#define PRIregister "016lx" #endif #if defined(__SIZE_TYPE__) -- generated by git-patchbot for /home/xen/git/xen.git#master _______________________________________________ Xen-changelog mailing list Xen-changelog@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/xen-changelog
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