[Xen-changelog] [xen staging] x86/apic: include the LDR when clearing out APIC registers

[patchbot@xxxxxxx]

commit 12a416837716922e0384a92bacfd8bc62a6409af
Author:     Bandan Das <bsd@xxxxxxxxxx>
AuthorDate: Fri Sep 6 17:07:14 2019 +0200
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Fri Sep 6 17:07:14 2019 +0200

    x86/apic: include the LDR when clearing out APIC registers
    
    Although APIC initialization will typically clear out the LDR before
    setting it, the APIC cleanup code should reset the LDR.
    
    This was discovered with a 32-bit KVM guest jumping into a kdump
    kernel. The stale bits in the LDR triggered a bug in the KVM APIC
    implementation which caused the destination mapping for VCPUs to be
    corrupted.
    
    Note that this isn't intended to paper over the KVM APIC bug. The kernel
    has to clear the LDR when resetting the APIC registers except when X2APIC
    is enabled.
    
    Signed-off-by: Bandan Das <bsd@xxxxxxxxxx>
    [Linux commit 558682b5291937a70748d36fd9ba757fb25b99ae]
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/apic.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/apic.c b/xen/arch/x86/apic.c
index c886b0a2d1..ea0d561f9d 100644
--- a/xen/arch/x86/apic.c
+++ b/xen/arch/x86/apic.c
@@ -212,6 +212,10 @@ void clear_local_APIC(void)
         apic_write(APIC_LVTTHMR, APIC_LVT_MASKED);
     if (maxlvt >= 6)
         apic_write(APIC_CMCI, APIC_LVT_MASKED);
+    if (!x2apic_enabled) {
+        v = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
+        apic_write(APIC_LDR, v);
+    }
 
     if (maxlvt > 3)        /* Due to Pentium errata 3AP and 11AP. */
         apic_write(APIC_ESR, 0);
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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