[Xen-changelog] [xen staging] xen/arm32: head: Rework and document zero_bss()

[patchbot@xxxxxxx]

commit 61748d7592a361ad175eab2bfc5a359a2fc22735
Author:     Julien Grall <julien.grall@xxxxxxx>
AuthorDate: Wed Jun 26 21:23:50 2019 +0100
Commit:     Julien Grall <julien.grall@xxxxxxx>
CommitDate: Sat Sep 7 12:10:43 2019 +0100

    xen/arm32: head: Rework and document zero_bss()
    
    On secondary CPUs, zero_bss() will be a NOP because BSS only need to be
    zeroed once at boot. So the call in the secondary CPUs path can be
    removed.
    
    Lastly, document the behavior and the main registers usage within the
    function.
    
    Signed-off-by: Julien Grall <julien.grall@xxxxxxx>
    Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
---
 xen/arch/arm/arm32/head.S | 14 ++++++++------
 1 file changed, 8 insertions(+), 6 deletions(-)

diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
index c7b4fe4cd4..1189ed6c47 100644
--- a/xen/arch/arm/arm32/head.S
+++ b/xen/arch/arm/arm32/head.S
@@ -192,7 +192,6 @@ GLOBAL(init_secondary)
         PRINT(" booting -\r\n")
 #endif
         bl    check_cpu_mode
-        bl    zero_bss
         bl    cpu_init
         bl    create_page_tables
         bl    enable_mmu
@@ -238,11 +237,15 @@ check_cpu_mode:
         b     fail
 ENDPROC(check_cpu_mode)
 
+/*
+ * Zero BSS
+ *
+ * Inputs:
+ *   r10: Physical offset
+ *
+ * Clobbers r0 - r3
+ */
 zero_bss:
-        /* Zero BSS On the boot CPU to avoid nasty surprises */
-        teq   r12, #0
-        bne   skip_bss
-
         PRINT("- Zero BSS -\r\n")
         ldr   r0, =__bss_start       /* Load start & end of bss */
         ldr   r1, =__bss_end
@@ -254,7 +257,6 @@ zero_bss:
         cmp   r0, r1
         blo   1b
 
-skip_bss:
         mov   pc, lr
 ENDPROC(zero_bss)
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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