[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

[Xen-changelog] [xen staging-4.11] xen/arm: traps: Avoid using BUG_ON() to check guest state in advance_pc()



commit 7f5f48dff399cb4739dc74f136fa605a0eaad1d5
Author:     Julien Grall <julien.grall@xxxxxxx>
AuthorDate: Wed May 15 21:17:30 2019 +0100
Commit:     Stefano Stabellini <sstabellini@xxxxxxxxxx>
CommitDate: Tue Oct 29 11:39:20 2019 -0700

    xen/arm: traps: Avoid using BUG_ON() to check guest state in advance_pc()
    
    The condition of the BUG_ON() in advance_pc() is pretty wrong because
    the bits [26:25] and [15:10] have a different meaning between AArch32
    and AArch64 state.
    
    On AArch32, they are used to store PSTATE.IT. On AArch64, they are RES0
    or used for new feature (e.g ARMv8.0-SSBS, ARMv8.5-BTI).
    
    This means a 64-bit guest will hit the BUG_ON() if it is trying to use
    any of these features.
    
    More generally, RES0 means that the bits is reserved for future use. So
    crashing the host is definitely not the right solution.
    
    In this particular case, we only need to know the guest was using 32-bit
    Mode and the Thumb instructions. So replace the BUG_ON() by a proper
    check.
    
    Reported-by: Lukas Jünger <lukas.juenger@xxxxxxxxxxxxxxxxxx>
    Signed-off-by: Julien Grall <julien.grall@xxxxxxx>
    Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
    (cherry picked from commit 72615f2e6b98e861c08abb1d2b194126013d54fe)
---
 xen/arch/arm/traps.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

diff --git a/xen/arch/arm/traps.c b/xen/arch/arm/traps.c
index 2a32441a61..e930585ad6 100644
--- a/xen/arch/arm/traps.c
+++ b/xen/arch/arm/traps.c
@@ -1654,12 +1654,9 @@ int check_conditional_instr(struct cpu_user_regs *regs, 
const union hsr hsr)
 void advance_pc(struct cpu_user_regs *regs, const union hsr hsr)
 {
     unsigned long itbits, cond, cpsr = regs->cpsr;
+    bool is_thumb = psr_mode_is_32bit(cpsr) && (cpsr & PSR_THUMB);
 
-    /* PSR_IT_MASK bits can only be set for 32-bit processors in Thumb mode. */
-    BUG_ON( (!psr_mode_is_32bit(cpsr)||!(cpsr&PSR_THUMB))
-            && (cpsr&PSR_IT_MASK) );
-
-    if ( cpsr&PSR_IT_MASK )
+    if ( is_thumb && (cpsr & PSR_IT_MASK) )
     {
         /* The ITSTATE[7:0] block is contained in CPSR[15:10],CPSR[26:25]
          *
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.11

_______________________________________________
Xen-changelog mailing list
Xen-changelog@xxxxxxxxxxxxxxxxxxxx
https://lists.xenproject.org/xen-changelog

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.