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[Xen-changelog] [xen staging] x86emul: correct far branch handling for 64-bit mode



commit 2d696d61452f83c03a38981302efbbea8a7dfc41
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Mon Dec 16 17:37:09 2019 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Mon Dec 16 17:37:09 2019 +0100

    x86emul: correct far branch handling for 64-bit mode
    
    AMD and friends explicitly specify that 64-bit operands aren't possible
    for these insns. Nevertheless REX.W isn't fully ignored: It still
    cancels a possible operand size override (0x66). Intel otoh explicitly
    provides for 64-bit operands on the respective insn page of the SDM.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Reviewed-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/arch/x86/x86_emulate/x86_emulate.c | 9 ++++++++-
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/xen/arch/x86/x86_emulate/x86_emulate.c 
b/xen/arch/x86/x86_emulate/x86_emulate.c
index 742280de23..5503844c4a 100644
--- a/xen/arch/x86/x86_emulate/x86_emulate.c
+++ b/xen/arch/x86/x86_emulate/x86_emulate.c
@@ -2519,9 +2519,16 @@ x86_decode_onebyte(
         case 6: /* push */
             if ( mode_64bit() && op_bytes == 4 )
                 op_bytes = 8;
-            /* fall through */
+            state->desc = DstNone | SrcMem | Mov;
+            break;
+
         case 3: /* call (far, absolute indirect) */
         case 5: /* jmp (far, absolute indirect) */
+            /* REX.W ignored on a vendor-dependent basis. */
+            if ( op_bytes == 8 &&
+                 (ctxt->cpuid->x86_vendor &
+                  (X86_VENDOR_AMD | X86_VENDOR_HYGON)) )
+                op_bytes = 4;
             state->desc = DstNone | SrcMem | Mov;
             break;
         }
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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