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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-changelog] [xen staging] x86/S3: Restore cr4 later during resume
commit 581deaa82952ac652ca1d838da34307a15031046
Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
AuthorDate: Fri Dec 13 17:56:40 2019 +0000
Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
CommitDate: Wed Dec 18 11:42:54 2019 +0000
x86/S3: Restore cr4 later during resume
Just like the BSP/AP paths, %cr4 is loaded with only PAE. Defer restoring
all
of %cr4 (MCE in particular) until all the system structures (IDT/TSS in
particular) have been loaded.
Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
Reviewed-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
---
xen/arch/x86/acpi/suspend.c | 3 +++
xen/arch/x86/acpi/wakeup_prot.S | 4 ----
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/xen/arch/x86/acpi/suspend.c b/xen/arch/x86/acpi/suspend.c
index c9dea67bf3..32d0f71ffd 100644
--- a/xen/arch/x86/acpi/suspend.c
+++ b/xen/arch/x86/acpi/suspend.c
@@ -43,6 +43,9 @@ void restore_rest_processor_state(void)
{
load_system_tables();
+ /* Restore full CR4 (inc MCE) now that the IDT is in place. */
+ write_cr4(mmu_cr4_features);
+
/* Recover syscall MSRs */
wrmsrl(MSR_LSTAR, saved_lstar);
wrmsrl(MSR_CSTAR, saved_cstar);
diff --git a/xen/arch/x86/acpi/wakeup_prot.S b/xen/arch/x86/acpi/wakeup_prot.S
index 2f6c8e18ef..a81849fd2b 100644
--- a/xen/arch/x86/acpi/wakeup_prot.S
+++ b/xen/arch/x86/acpi/wakeup_prot.S
@@ -45,10 +45,6 @@ ENTRY(do_suspend_lowlevel)
ENTRY(s3_resume)
lgdt boot_gdtr(%rip)
- /* mmu_cr4_features contains latest cr4 setting */
- mov REF(mmu_cr4_features), GREG(ax)
- mov GREG(ax), %cr4
-
mov REF(saved_cr0), GREG(ax)
mov GREG(ax), %cr0
--
generated by git-patchbot for /home/xen/git/xen.git#staging
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