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[Xen-changelog] [xen staging] IRQ: u16 is too narrow for an event channel number



commit 892b9dcebdb7f646657e11cfdd95a385107bbefa
Author:     Jan Beulich <jbeulich@xxxxxxxx>
AuthorDate: Tue Jan 14 12:03:47 2020 +0100
Commit:     Jan Beulich <jbeulich@xxxxxxxx>
CommitDate: Tue Jan 14 12:03:47 2020 +0100

    IRQ: u16 is too narrow for an event channel number
    
    FIFO event channels allow ports up to 2^17, so we need to use a wider
    field in struct pirq. Move "masked" such that it may share the 8-byte
    slot with struct arch_pirq on 64-bit arches, rather than leaving a
    7-byte hole in all cases.
    
    Take the opportunity and also add a comment regarding "arch" placement
    within the structure.
    
    Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
    Acked-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
 xen/include/xen/irq.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/xen/include/xen/irq.h b/xen/include/xen/irq.h
index 0f91884d57..59d5e45bb0 100644
--- a/xen/include/xen/irq.h
+++ b/xen/include/xen/irq.h
@@ -127,9 +127,10 @@ struct vcpu;
 
 struct pirq {
     int pirq;
-    u16 evtchn;
-    bool_t masked;
+    evtchn_port_t evtchn;
     struct rcu_head rcu_head;
+    bool masked;
+    /* Architectures may require this field to be last. */
     struct arch_pirq arch;
 };
 
--
generated by git-patchbot for /home/xen/git/xen.git#staging

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