[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen staging] x86/pv: Make the PV default WRMSR path match the HVM default
commit 0562cbc14cf02b8188b9f1f37f39a4886776ce7c Author: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> AuthorDate: Thu Jul 23 18:33:51 2020 +0100 Commit: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> CommitDate: Fri Jul 24 10:15:19 2020 +0100 x86/pv: Make the PV default WRMSR path match the HVM default The current HVM default for writes to unknown MSRs is to inject #GP if the MSR is unreadable, and discard writes otherwise. While this behaviour isn't great, the PV default is even worse, because it swallows writes even to non-readable MSRs. i.e. A PV guest doesn't even get a #GP fault for a write to a totally bogus index. Update PV to make it consistent with HVM, which will simplify the task of making other improvements to the default MSR behaviour. Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx> Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx> --- xen/arch/x86/pv/emul-priv-op.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c index f14552cb4b..efeb2a727e 100644 --- a/xen/arch/x86/pv/emul-priv-op.c +++ b/xen/arch/x86/pv/emul-priv-op.c @@ -1113,7 +1113,10 @@ static int write_msr(unsigned int reg, uint64_t val, } /* fall through */ default: - if ( (rdmsr_safe(reg, temp) != 0) || (val != temp) ) + if ( rdmsr_safe(reg, temp) ) + break; + + if ( val != temp ) invalid: gdprintk(XENLOG_WARNING, "Domain attempted WRMSR %08x from 0x%016"PRIx64" to 0x%016"PRIx64"\n", -- generated by git-patchbot for /home/xen/git/xen.git#staging
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