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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [xen master] xen/arm: Enable CPU Erratum 1165522 for Neoverse
commit 858c0be8c2fa4125a0fa0acaa03ae730e5c7cb3c
Author: Bertrand Marquis <bertrand.marquis@xxxxxxx>
AuthorDate: Tue Aug 18 14:47:39 2020 +0100
Commit: Julien Grall <jgrall@xxxxxxxxxx>
CommitDate: Thu Aug 20 10:19:50 2020 +0100
xen/arm: Enable CPU Erratum 1165522 for Neoverse
Enable CPU erratum of Speculative AT on the Neoverse N1 processor
versions r0p0 to r2p0.
Also Fix Cortex A76 Erratum string which had a wrong errata number.
Signed-off-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
Acked-by: Julien Grall <jgrall@xxxxxxxxxx>
---
xen/arch/arm/cpuerrata.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm/cpuerrata.c b/xen/arch/arm/cpuerrata.c
index 0248893de0..6c09017515 100644
--- a/xen/arch/arm/cpuerrata.c
+++ b/xen/arch/arm/cpuerrata.c
@@ -476,9 +476,15 @@ static const struct arm_cpu_capabilities arm_errata[] = {
.matches = has_ssbd_mitigation,
},
#endif
+ {
+ /* Neoverse r0p0 - r2p0 */
+ .desc = "ARM erratum 1165522",
+ .capability = ARM64_WORKAROUND_AT_SPECULATE,
+ MIDR_RANGE(MIDR_NEOVERSE_N1, 0, 2 << MIDR_VARIANT_SHIFT),
+ },
{
/* Cortex-A76 r0p0 - r2p0 */
- .desc = "ARM erratum 116522",
+ .desc = "ARM erratum 1165522",
.capability = ARM64_WORKAROUND_AT_SPECULATE,
MIDR_RANGE(MIDR_CORTEX_A76, 0, 2 << MIDR_VARIANT_SHIFT),
},
--
generated by git-patchbot for /home/xen/git/xen.git#master
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