[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [qemu-xen staging] error: Strip trailing '\n' from error string arguments (again)
commit ff5b5d5b6df5655946142820912b28f1a67efc94 Author: Markus Armbruster <armbru@xxxxxxxxxx> AuthorDate: Wed Jul 22 10:40:46 2020 +0200 Commit: Markus Armbruster <armbru@xxxxxxxxxx> CommitDate: Fri Jul 24 12:56:44 2020 +0200 error: Strip trailing '\n' from error string arguments (again) Tracked down with scripts/coccinelle/err-bad-newline.cocci. Cc: Peter Xu <peterx@xxxxxxxxxx> Cc: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx> Signed-off-by: Markus Armbruster <armbru@xxxxxxxxxx> Message-Id: <20200722084048.1726105-3-armbru@xxxxxxxxxx> Reviewed-by: Philippe Mathieu-Daudé <philmd@xxxxxxxxxx> Acked-by: David Gibson <david@xxxxxxxxxxxxxxxxxxxxx> Reviewed-by: Peter Xu <peterx@xxxxxxxxxx> --- hw/i386/intel_iommu.c | 6 +++--- target/ppc/mmu-hash64.c | 2 +- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 0c286635cf..5284bb68b6 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2356,7 +2356,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) if ((inv_desc->lo & VTD_INV_DESC_IOTLB_RSVD_LO) || (inv_desc->hi & VTD_INV_DESC_IOTLB_RSVD_HI)) { error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 - ", lo=0x%"PRIx64" (reserved bits unzero)\n", + ", lo=0x%"PRIx64" (reserved bits unzero)", __func__, inv_desc->hi, inv_desc->lo); return false; } @@ -2377,7 +2377,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) am = VTD_INV_DESC_IOTLB_AM(inv_desc->hi); if (am > VTD_MAMV) { error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 - ", lo=0x%"PRIx64" (am=%u > VTD_MAMV=%u)\n", + ", lo=0x%"PRIx64" (am=%u > VTD_MAMV=%u)", __func__, inv_desc->hi, inv_desc->lo, am, (unsigned)VTD_MAMV); return false; @@ -2387,7 +2387,7 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s, VTDInvDesc *inv_desc) default: error_report_once("%s: invalid iotlb inv desc: hi=0x%"PRIx64 - ", lo=0x%"PRIx64" (type mismatch: 0x%llx)\n", + ", lo=0x%"PRIx64" (type mismatch: 0x%llx)", __func__, inv_desc->hi, inv_desc->lo, inv_desc->lo & VTD_INV_DESC_IOTLB_G); return false; diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index e5baabf0e1..c31d21e6a9 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -859,7 +859,7 @@ static int build_vrma_slbe(PowerPCCPU *cpu, ppc_slb_t *slb) } error_report("Bad page size encoding in LPCR[VRMASD]; LPCR=0x" - TARGET_FMT_lx"\n", lpcr); + TARGET_FMT_lx, lpcr); return -1; } -- generated by git-patchbot for /home/xen/git/qemu-xen.git#staging
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