[xen staging-4.13] xen/arm: Add workaround for Cortex-A53 erratum #843419

[patchbot@xxxxxxx]

commit 8505e8a10e422daf9af086a9e61207bca8f4d28c
Author:     Luca Fancellu <luca.fancellu@xxxxxxx>
AuthorDate: Fri Mar 19 11:55:03 2021 -0700
Commit:     Stefano Stabellini <sstabellini@xxxxxxxxxx>
CommitDate: Fri Mar 19 12:20:52 2021 -0700

    xen/arm: Add workaround for Cortex-A53 erratum #843419
    
    On the Cortex A53, when executing in AArch64 state, a load or store 
instruction
    which uses the result of an ADRP instruction as a base register, or which 
uses
    a base register written by an instruction immediately after an ADRP to the
    same register, might access an incorrect address.
    
    The workaround is to enable the linker flag --fix-cortex-a53-843419
    if present, to check and fix the affected sequence. Otherwise print a 
warning
    that Xen may be susceptible to this errata
    
    Signed-off-by: Luca Fancellu <luca.fancellu@xxxxxxx>
    Reviewed-by: Bertrand Marquis <bertrand.marquis@xxxxxxx>
    Reviewed-by: Stefano Stabellini <sstabellini@xxxxxxxxxx>
    [backport: LDFLAGS/XEN_LDFLAGS, move ld-option to Config.mk]
    (cherry picked from commit d81133d45d81d35a4e7445778bfd1179190cbd31)
---
 Config.mk                        | 12 ++++++++++++
 docs/misc/arm/silicon-errata.txt |  1 +
 xen/arch/arm/Kconfig             | 19 +++++++++++++++++++
 xen/arch/arm/Makefile            |  8 ++++++++
 4 files changed, 40 insertions(+)

diff --git a/Config.mk b/Config.mk
index 6f0321a9ee..75f4eadbf9 100644
--- a/Config.mk
+++ b/Config.mk
@@ -130,6 +130,18 @@ define cc-ver-check-closure
     endif
 endef
 
+# $(if-success,<command>,<then>,<else>)
+# Return <then> if <command> exits with 0, <else> otherwise.
+if-success = $(shell { $(1); } >/dev/null 2>&1 && echo "$(2)" || echo "$(3)")
+
+# $(success,<command>)
+# Return y if <command> exits with 0, n otherwise
+success = $(call if-success,$(1),y,n)
+
+# $(ld-option,<flag>)
+# Return y if the linker supports <flag>, n otherwise
+ld-option = $(call success,$(LD) -v $(1))
+
 # cc-ifversion: Check compiler version and take branch accordingly
 # Usage $(call cc-ifversion,lt,0x040700,string_if_y,string_if_n)
 cc-ifversion = $(shell [ $(call cc-ver,$(CC),$(1),$(2)) = "y" ] \
diff --git a/docs/misc/arm/silicon-errata.txt b/docs/misc/arm/silicon-errata.txt
index a15290285f..67f9f3b395 100644
--- a/docs/misc/arm/silicon-errata.txt
+++ b/docs/misc/arm/silicon-errata.txt
@@ -45,6 +45,7 @@ stable hypervisors.
 | ARM            | Cortex-A53      | #827319         | ARM64_ERRATUM_827319    
|
 | ARM            | Cortex-A53      | #824069         | ARM64_ERRATUM_824069    
|
 | ARM            | Cortex-A53      | #819472         | ARM64_ERRATUM_819472    
|
+| ARM            | Cortex-A53      | #843419         | ARM64_ERRATUM_843419    
|
 | ARM            | Cortex-A55      | #1530923        | N/A                     
|
 | ARM            | Cortex-A57      | #852523         | N/A                     
|
 | ARM            | Cortex-A57      | #832075         | ARM64_ERRATUM_832075    
|
diff --git a/xen/arch/arm/Kconfig b/xen/arch/arm/Kconfig
index bcd05c4f02..87413543d1 100644
--- a/xen/arch/arm/Kconfig
+++ b/xen/arch/arm/Kconfig
@@ -188,6 +188,25 @@ config ARM64_ERRATUM_819472
 
          If unsure, say Y.
 
+config ARM64_ERRATUM_843419
+       bool "Cortex-A53: 843419: A load or store might access an incorrect 
address"
+       default y
+       depends on ARM_64
+       help
+         This option adds an alternative code sequence to work around ARM
+         erratum 843419 on Cortex-A53 parts up to r0p4.
+
+         When executing in AArch64 state, a load or store instruction which 
uses
+         the result of an ADRP instruction as a base register, or which uses a
+         base register written by an instruction immediately after an ADRP to 
the
+         same register, might access an incorrect address.
+
+         The workaround enables the linker to check if the affected sequence is
+         produced and it will fix it with an alternative not affected sequence
+         that produce the same behavior.
+
+         If unsure, say Y.
+
 config ARM64_ERRATUM_832075
        bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory 
accesses with device loads"
        default y
diff --git a/xen/arch/arm/Makefile b/xen/arch/arm/Makefile
index 8edb200245..d7618d52a7 100644
--- a/xen/arch/arm/Makefile
+++ b/xen/arch/arm/Makefile
@@ -102,6 +102,14 @@ prelink.o: $(ALL_OBJS)
        $(LD) $(LDFLAGS) -r -o $@ $^
 endif
 
+ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)
+    ifeq ($(call ld-option, --fix-cortex-a53-843419),n)
+        $(warning ld does not support --fix-cortex-a53-843419; xen may be 
susceptible to erratum)
+    else
+        LDFLAGS += --fix-cortex-a53-843419
+    endif
+endif
+
 $(TARGET)-syms: prelink.o xen.lds
        $(LD) $(LDFLAGS) -T xen.lds -N prelink.o \
            $(BASEDIR)/common/symbols-dummy.o -o $(@D)/.$(@F).0
--
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