[xen staging-4.15] Intel Processor Trace Support: Add CHANGELOG.md and SUPPORT.md entries

[patchbot@xxxxxxx]

commit a4b346260cf2ca863d224c38c8ba8c0a4295f864
Author:     George Dunlap <george.dunlap@xxxxxxxxxx>
AuthorDate: Tue Mar 23 13:55:57 2021 +0000
Commit:     George Dunlap <george.dunlap@xxxxxxxxxx>
CommitDate: Tue Apr 6 17:55:19 2021 +0100

    Intel Processor Trace Support: Add CHANGELOG.md and SUPPORT.md entries
    
    Signed-off-by: George Dunlap <george.dunlap@xxxxxxxxxx>
    Acked-by: Jan Beulich <jbeulich@xxxxxxxx>
    Release-acked-by: Ian Jackson <ian.jackson@xxxxxxxxxx>
---
 CHANGELOG.md | 1 +
 SUPPORT.md   | 7 +++++++
 2 files changed, 8 insertions(+)

diff --git a/CHANGELOG.md b/CHANGELOG.md
index 30b53e73e8..2f5edf091e 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -11,6 +11,7 @@ The format is based on [Keep a 
Changelog](https://keepachangelog.com/en/1.0.0/)
  - Renesas IPMMU-VMSA (Supported, not security supported; was Tech Preview)
  - ARM SMMUv3 (Tech Preview)
  - Switched MSR accesses to deny by default policy.
+ - Intel Processor Trace support (Tech Preview)
 
 ### Removed / support downgraded
 
diff --git a/SUPPORT.md b/SUPPORT.md
index a1efd8fcfd..cd0c09e6a4 100644
--- a/SUPPORT.md
+++ b/SUPPORT.md
@@ -247,6 +247,13 @@ Export hypervisor coverage data suitable for analysis by 
gcov or lcov.
 
     Status: Supported, Not security supported
 
+### Processor trace support
+
+Support for using Intel Processor Trace technology to trace guests
+from dom0.
+
+    Status, x86: Tech Preview
+
 ## Memory Management
 
 ### Dynamic memory control
--
generated by git-patchbot for /home/xen/git/xen.git#staging-4.15