[xen staging] arm/page: Get rid of READ/WRITE_SYSREG32

[patchbot@xxxxxxx]

commit 86faae561cd8eee819e0f42ba7a18dd180aa49d1
Author:     Michal Orzel <michal.orzel@xxxxxxx>
AuthorDate: Wed May 5 09:43:06 2021 +0200
Commit:     Julien Grall <jgrall@xxxxxxxxxx>
CommitDate: Mon May 10 18:16:34 2021 +0100

    arm/page: Get rid of READ/WRITE_SYSREG32
    
    AArch64 registers are 64bit whereas AArch32 registers
    are 32bit or 64bit. MSR/MRS are expecting 64bit values thus
    we should get rid of helpers READ/WRITE_SYSREG32
    in favour of using READ/WRITE_SYSREG.
    We should also use register_t type when reading sysregs
    which can correspond to uint64_t or uint32_t.
    Even though many AArch64 registers have upper 32bit reserved
    it does not mean that they can't be widen in the future.
    
    Modify accesses to CTR_EL0 to use READ/WRITE_SYSREG.
    
    Signed-off-by: Michal Orzel <michal.orzel@xxxxxxx>
    Reviewed-by: Julien Grall <jgrall@xxxxxxxxxx>
---
 xen/include/asm-arm/page.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/xen/include/asm-arm/page.h b/xen/include/asm-arm/page.h
index 131507a517..c6f9fb0d4e 100644
--- a/xen/include/asm-arm/page.h
+++ b/xen/include/asm-arm/page.h
@@ -137,10 +137,10 @@ extern size_t dcache_line_bytes;
 
 static inline size_t read_dcache_line_bytes(void)
 {
-    uint32_t ctr;
+    register_t ctr;
 
     /* Read CTR */
-    ctr = READ_SYSREG32(CTR_EL0);
+    ctr = READ_SYSREG(CTR_EL0);
 
     /* Bits 16-19 are the log2 number of words in the cacheline. */
     return (size_t) (4 << ((ctr >> 16) & 0xf));
--
generated by git-patchbot for /home/xen/git/xen.git#staging